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Apparatus and method for recovering a clock signal for use in a portable data carrier
| Details |
Inventors: Hill, Michael John;
Assignee: Motorola, Inc. (Schaumburg, IL)
Primary Examiner: Tse; Young T.
Assistant Examiner:
Attorney, Agent or Firm:
A portable data carrier includes a radio frequency (RF) receiving circuit tuned to receive power signals on a carrier frequency, f.sub.c. The portable data carrier further includes a processor that uses a clock signal for operation thereof. A method of recovering the clock signal includes the steps of receiving timing information on a first sub-carrier frequency, f.sub.s 1, that is offset from f.sub.c by a predetermined frequency. The timing information is then demodulated and the clock signal is extracted therefrom. |
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DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT The present invention encompasses a portable data carrier (e. g. a smart card) that includes a radio frequency (RF) receiving circuit that is tuned to receive power signals on a carrier frequency, f. sub. c. The smart card also includes a processing element requiring a clock-signal that is generated according to the present invention. An information signal is received on a first sub-carrier frequency varying in-frequency from f. sub. c by a predetermined amount f. sub. s 1. The information signal includes timing information which is demodulated by the smart card and used to extract the clock signal for use by the processing element thereof. In this manner, the present invention solves the problems of the prior art by providing a cost effective technique for receiving the timing information from which a clock signal can be generated. Moreover, the carrier frequency need not be modulated to extract the clock signal. The present invention can be better understood with reference to FIGS. 1-6. FIG. 1 shows a simplified block diagram of a smart card 100, according to the present invention. A smart card substrate 102 has disposed therein a processing element (MPU) 103. Smart card 100 further includes a power receiving circuit 104, which serves to extract the power signal 105 from the carrier frequency generated by a terminal/reader. A separate information receiving circuit 106 comprises a sub-carrier demodulator, as later described. A clock signal 107 and a data signal 108 are both extracted from the sub-carrier frequency and inputted to the processing element 103 for use thereby. A transmitting circuit 110 is shown here as being coupled to the processing element 103 for down-link (card to terminal) transmissions. (In practice, however, the down-link transmitter section is often embodied in the up-link circuitry--i. e. , they share a common antenna arrangement. ) As will be later described with reference to FIG. 4, the down-link transmissions may or may not be sent using the same sub-carrier frequency from which the clock signal is derived
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