Magnetic liquid supported linear accelerometer |
| According to the invention, there is provided a linear accelerometer having a proof mass comprising ... |
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High speed memory packaging scheme
| Details |
Inventors: Sanwo, Ikuo J.; Hoffman, Michael A.; Kim, Hyung S.;
Assignee: NCR Corporation (Dayton, OH)
Primary Examiner: Sparks; Donald A.
Assistant Examiner:
Attorney, Agent or Firm: Stover; James M.
A memory packaging scheme for high speed computer systems includes, several memory module sockets mounted to a printed circuit board and interconnected by a common set of address, data and control transmission lines within the printed circuit board. The transmission lines are interrupted at each connector. Cooperating memory modules, such as SIMM memory modules are installed in sequence into one or more of the module sockets in accordance with the requirements of the computer system. Installation of a memory module into a memory socket closes the open circuits for each one of the transmission lines at the memory socket, extending the uninterrupted length of the transmission lines to the next memory socket in the sequence. The memory socket and cooperating memory module design thus provides for sizing of the memory board transmission line lengths to accommodate the number of memory modules installed into memory board sockets, thereby eliminating undesirable transmission line effects from occurring within the printed circuit board transmission lines connecting the memory modules. |
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DETAILED DESCRIPTION There is provided, in accordance with the present invention, a computer memory system comprising a plurality of connectors mounted on a printed circuit board and interconnected by a plurality of transmission lines formed in the printed circuit board. Each of the transmission lines sequentially connects respective points on the plurality of connectors, the plurality of connectors being connected in the same sequence by each of the transmission lines. Each connector is designed to receive memory modules, such as SIMM modules, and provide electrical connection between the plurality of transmission lines and memory logic within a memory module coupled with the connector. Each connector further provides an open circuit in each of the transmission lines in the absence of a memory module coupled with the connector. In the described embodiment, the connectors each comprise an electrical edge connector including a plurality of signal contacts arranged in pairs forming two rows, the first row being comprised of a first member from each of said pairs and the second row being comprised of a second member from each of said pairs. Each transmission line comprises a plurality of line segments connected between the connectors, each segment providing electrical connection between a first member of a pair of signal contacts associated with a first connector and a second member of a pair of signal contacts associated with a second connector. The cooperating memory modules each include an edge having a plurality of surface contacts which are located along and adjacent to the edge on opposite sides of said memory module. During coupling with a connector, the module edge is placed between the first and second rows of the connector's signal contacts thereby establishing an electrical path between the members of each signal contact pair. Memory modules are installed into the connectors in the same sequence in which the connectors are connected along the transmission lines In one embodiment of the present invention, a termination module including termination resistors corresponding to the plurality of transmission lines is also provided for installation into the connector immediately following the connectors in which memory modules are installed
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