 Combined universal head and grip |
| To resolve the above described problems, in a first combined universal head and grip according to ... |
|
| Vessel wave heading control apparatus |
| The novel apparatus of the present invention comprises two accelerometers mounted so that their ... |
|
| Device and method for object-based development of business applications software |
| OF SPECIFIC EMBODIMENTS The present invention provides in a preferred embodiment a sophisticated ... |
|
| Apparatus and method for displaying job list, and storage medium for such a program |
| It is, therefore, one objective of the present invention to provide an apparatus and a method that ... |
|
| Contact alerts for unconnected users |
| We claim: 1. A method for connecting users to a first communication network, comprising: providing ... |
|
| Method and apparatus for modal dialog box management in applets on information appliances |
| A described embodiment of the present invention allows the user to escape from unwanted modal ... |
|
| Web-based groupware system |
| Accordingly, in one of its aspects, the present invention provides a system for providing a ... |
|
| Multiaxis digital robot control having a backup velocity monitor and protection system |
| A digital control is provided for a robot having a plurality of arm joints. An electric motor ... |
|
| Circuit to perform a linear transformation on a digital signal |
| The object of the invention is to eliminate the drawbacks, particularly the low performance to ... |
|
|
Optimal parallel processor architecture for real time multitasking
| Details |
Inventors: Kartalopoulos, Stamatios V.;
Assignee: Lucent Technologies Inc. (Murray Hill, NJ)
Primary Examiner: Oberley; Alvin E.
Assistant Examiner: Banankhah; Majid
Attorney, Agent or Firm:
A process for producing a parallel processor system having the minimum number of microprocessors necessary execute in real time a set of tasks of a multi-tasking application such that execution of an activity of a first task is followed by execution of an activity of a second task. The process includes the step of selecting an initial number of microprocessors for executing the application in real-time. The selecting step includes placing in a first column of a matrix all real-time constrained tasks specific to the application and associating a row of dependent tasks with each task placed in the first column of the matrix to define a plurality of task subsets, each subset incorporating a maximum number of intradependent tasks and a minimum number of interdependent tasks and the number of subsets corresponding to the initial number of microprocessors. The inventive process further includes the steps of listing dependencies between rows in a second column of the matrix, assigning a priority p.sub.i to each task where p.sub.i is between 0 and 1, subdividing at least one of the tasks into discrete activities, each of the activities having a corresponding execution time t.sub.ij, estimating the execution time for each activity, reducing the number of rows in the matrix by grouping together tasks having activities that can be executed within a predetermined time window T, and providing a number of microprocessors corresponding to the number of rows obtained from the rows reducing step. |
|
DETAILED DESCRIPTION The aforementioned objects, as well as others which will become apparent hereinafter, are achieved by a parallel processing system for executing in real time an interactive multi-tasking program which includes a plurality of intradependent tasks and a plurality of interdependent tasks.
The processor of the present invention comprises a system controller and a plurality of microprocessor units operatively associated with the controller.
Each of the microprocessor units has a memory associated therewith and is operable to perform a subset of tasks, the subset containing a maximum number of intradependent tasks and a minimum number of interdependent tasks with at least one task of each subset having a real time constraint.
Preferably, each microprocessor is provided with an on-chip memory.
The system further includes first means interconnecting the microprocessor units for communicating status and execution results therebetween and second means interconnecting the system controller and at least one of the microprocessor units for permitting communication therebetween.
Each task comprises a plurality of individual activities with each activity having a priority of from 0 to 1 assigned thereto, and the system further includes vector means for identifying the priority of each activity, means for pointing to entry points of unexecuted activities, first flag means associated with dependent activities for indicating that a first activity has been executed while a second activity dependent thereon is still in progress, and timing means for measuring actual activity execution times.
The present invention also provides a process for producing a parallel processor system having the minimum number of microprocessors necessary to execute in real time a set of tasks of a multi-tasking application such that execution of an activity of a first task is followed by execution of an activity of a second task.
The process includes the step of selecting an initial number of microprocessors for executing the application in real-time, such selecting step including placing in a first column of a matrix all real-time constrained tasks specific to the application and associating a row of dependent tasks with each task placed in the first column of the matrix to define a plurality of task subsets, each subset comprising a maximum number of intradependent tasks and a minimum number of interdependent tasks and corresponding to the initial number of microprocessors
|
|
Databases 
