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 Vehicle instrument panel lamps, improved pulse width dimmer system therefor

Details
Inventors: Dean, Patrick D.; Sabbah, Abbas T.;
Assignee: Chrysler Corporation (Highland Park, MI)
Primary Examiner: Pascal; Robert J.
Assistant Examiner: Philogene; Haissa
Attorney, Agent or Firm: Fredericks; Wendell K.

A pulse width dimming system responsive to low frequency pulse width modulated signals of various duty cycles employs a single charging capacitor in a charge pump circuit connected between a voltage source and the output of an FET for developing voltage pulse signals for controlling current through a field effect transistor used to control the intensity of lamps in a vehicle instrument panel.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT FIG.
1 illustrates in a partial pictorial, partial schematic diagram, a prior art vehicle Lamp Intensity Control System 10 described in a co-pending patent application Ser.
No.
07/855,975 filed Mar.
31, 1992 by the present inventors entitled "Vehicle Instrument Panel Lamps, Pulse Width Dimmer System Therefor" and now abandoned that includes a pulse width dimming (PWD) module 12.
This system permits dimming and brightening the panel lamps 58-58 within an instrument panel and console of the vehicle.
Battery power (VBATT) for the system emanates from a 12 VDC vehicle battery 11.
A power relay 15 connected across battery 11 by instrument panel light switch 19 provides dimming voltage (VDIM) for powering PWD module 10.
Also, battery 11 supplies power to a conventional 5 VDC regulator 13 used to provide power to MCU 16.
An instrument panel dimmer control potentiometer 14, connected to TP-2 of MCU 16, adjustable between OFF or ground and fully ON, allows an operator to adjust a control signal to an analog to digital (A/D) converter 17 within microcontroller unit (MCU) 16 located in the instrument panel.
The digital signal from the A/D converter 17 regulates the duration of the 5 VDC pulses from PWM circuit 18 in MCU 16.
Illustratively, the duty cycle of a 122 Hz PWM signal can vary from 10%-99%.
This manually varied duration PWM signal routes to an input circuit of the PWD module 12.
The PWM signal from MCU 16, having an amplitude of e.
g.
5 VDC goes to a failsafe circuit 20 of PWD module 12.
The PWM signal enters module 12 through one end of a resistor 22, connected to TP-1 of MCU 16, and travels to the base of a NPN transistor switch 24.
Providing the failsafe feature, transistor 24 cuts off if PWM 18 ceases to function or MCU 16 goes into reset mode.
Cutting off transistor 24 inhibits operation of the output ON/OFF circuit 37 as well as the succeeding circuits.
Otherwise, transistor 24 acts as an inverter and level shifter providing 12 VDC pulses at terminal (A) of an opposite polarity from that at TP-1 of MCU 16



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