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Fault Detection

Apparatus-for-I-O-leakage-self-test-in-an-integrated-circuit

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Apparatus for I/O leakage self-test in an integrated circuit

Details

Inventors: Frodsham, R. Tim; O'Brien, David J.;
Assignee: Intel Corporation (Santa Clara, CA)
Primary Examiner: Metjahic; Safet
Assistant Examiner: Hamdan; Wasseem H.
Attorney, Agent or Firm: Blakely, Sokoloff, Taylor & Zafman LLP

According to one embodiment, an integrated circuit is disclosed that includes a first input/output (I/O) circuit and a leakage detection circuit coupled to the first I/O circuit. In a test mode of operation, the leakage detection circuit tests the first I/O circuit for excessive leakage current. According to another embodiment, the integrated circuit also includes a first resistor coupled between a line voltage and the first I/O circuit and a second resistor coupled between the first I/O circuit and ground. Further, the integrated circuit includes a second I/O circuit coupled to the leakage detection circuit and the first and second resistors. The leakage circuit also tests the second I/O circuit for excessive leakage current in the test mode of operation.

DETAILED DESCRIPTION According to one embodiment, an integrated circuit is disclosed that includes a first input/output (I/O) circuit and a leakage detection circuit coupled to the first I/O circuit.
The leakage detection circuit tests the first I/O circuit for excessive leakage current.

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