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Multiprocessor programmable interrupt controller system adapted to functional redundancy checking processor systems
It is the object of the current invention to provide a multiprocessor programmable interrupt controller (MPIC) system including, but not limited to, the following ...
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Protocol for interrupt bus arbitration in a multi-processor system
One object of the present invention is to provide for a multi-processor programmable interrupt controller (MPIC) system that uses an integrated circuit chip ...
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Multiprocessor computer backlane bus
OF THE PREFERRED EMBODIMENTS The following detailed description describes the logical, electrical, and connector specifications of Pyramid Technology Corporation's R-B ...
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Digital data processing methods and apparatus for fault detection and fault tolerance
The invention provides, in one aspect, a digital data processing device that includes a bus for transmitting signals (e.g., data and/or address information) between ...
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Method and apparatus for allocating display memory and main memory employing access request arbitration and buffer control
The present invention, generally speaking, provides a low-cost, moderate performance small computer system by allowing a single sharable block of memory to be ...
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Register set reordering for a graphics processor based upon the type of primitive to be rendered
The present invention provides a technique and protocol for reordering the register sets comprising the register file based upon the type of primitive to be rendered. T...
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Preamplification method and apparatus for dram sense amplifiers
An object of the present invention is to improve reliability of read out in DRAM. Another object of the present invention is to increase the potential difference applied ...
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Semiconductor memory device
It is an object of the present invention to provide a semiconductor memory device including a FAMOS transistor type redundancy decoder circuit suitable for practical use....
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Semiconductor device
It is accordingly the object of this invention to provide a reliable semiconductor device which enables binary data to be stored in a nonvolatile memory element without ...
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Data stream smoothing using a FIFO memory
The present invention is directed to the use of a FIFO memory for communicating data from a DRAM to a testing device in a continuous data stream despite interruptions ...
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