 Integrated circuit I/O using a high performance bus interface |
| The present invention is designed to provide a high speed, multiplexed bus for communication ... |
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| Memory defect masking device |
| Therefore, the main objective of the present invention is to provide a memory defect masking device ... |
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| Bidirectional line switch ring network |
| Therefore, in view of the above-mentioned problems, the present invention has as its object the ... |
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| Virtual multi-port RAM |
| It is therefore an object of the present invention to provide a multi-port RAM structure which ... |
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| Decoding global drive/boot signals using local predecoders |
| One aspect of the invention comprises a decoding circuit for driving a word line associated with at ... |
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| Semiconductor memory device having even and odd numbered bank memories |
| An object of this ivention is to provide a semiconductor memory device which can simultaneously ... |
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| Semiconductor memory device having split operation and capable of reducing power supply noise |
| An object of the present invention is to provide a semiconductor memory device that effectively ... |
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| Monolithically integrated semiconductor circuit |
| I claim: 1. Monolithically integrated digital semiconductor circuit, comprising an address decoder, ... |
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Circuit and method for signal transmission
| Details |
Inventors: Yamauchi, Hiroyuki;
Assignee: Matsushita Electric Industrial Co., Ltd. (Osaka, JP)
Primary Examiner: Chan; Jason
Assistant Examiner: Corrielus; Jean B
Attorney, Agent or Firm: McDermott, Will & Emery
Two multiplexors select a first signal Ain and its inverted signal /Ain in the first half of a single cycle of a clock signal and Ain and /Ain, i.e., a differential signal pair, are differential-transmitted to two signal lines. On the other hand, the two multiplexors select a second signal Bin and its inverted signal /Bin in the second half and Bin and /Bin, i.e., a differential signal pair, are differential-transmitted to the two signal lines. Based on the transition probability of Ain and Bin or based on the mode information of a system, either Ain or Bin is selected and is differential-transmitted. As a result of such arrangement, when the transmission of one of Ain and Bin is not required, the other signal can continuously be differential-transmitted using an unoccupied signal line, which makes it possible to increase the rate of signal transmission without having to increase the number of signal lines. |
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DETAILED DESCRIPTION Bearing in mind the above-described problems with the prior art techniques, the present invention was made.
Accordingly, it is an object of the present invention to provide an improved signal transmission technique.
More specifically, wire sharing is employed even in signal transmission circuits with great numbers of signal transmission lines, whereby, without increasing the number of signal transmission lines, signal differential-transmission can be executed while accomplishing area saving.
Additionally, at the time of such signal differential-transmission, if the contents of a signal that is differential-transmitted do not change, then another signal whose contents undergo a change is selected and is differential-transmitted.
In other words, the present invention employs a configuration capable of choosing signals to be conveyed.
Power saving by means of small amplitude transmission and improvements in the signal transmission rate can be accomplished by small and low-cost signal transmission circuits and by signal transmission methods in accordance with the present invention.
It is another object of the present invention to provide improved signal transmission circuits and methods capable of achieving high signal transmission rates by using a configuration capable of transmitting, when the contents of a signal that is transmitted through one signal transmission line change, such a signal by making use of another vacant signal transmission line.
The present invention achieves the first object with the following arrangement.
In accordance with the present invention, it is basically arranged such that, in two signal transmission lines, two signals corresponding to the two signal transmission lines are not transmitted at the same time.
More specifically, one of the two signals is differential-transmitted using the two signal transmission lines in the first half of one cycle of the clock signal and the other signal is differential-transmitted using the two signal transmission lines in the second half
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Fault Detection 
