High sensitivity sense amplifier using different threshold valued MOS devices

DETAILED DESCRIPTION The present invention was made to overcome the above and other problems encountered in the conventional sense amplifiers and has for its object to provide a sense amplifier with a higher degree of sensitivity.
To the above and other ends, the present invention provides a sense amplifier comprising a first inverter comprising a series circuit of a first transistor which is a driving transistor and which has a first input terminal and a second transistor which is a load transistor; a second inverter comprising a series circuit of a third transistor which is a driving transistor and which has a second input terminal and a fourth transistor which is a load transistor; a third inverter comprising a series circuit of a fifth transistor which is a driving transistor and to which is applied the output of said second inverter and a sixth transistor which is a load transistor, the junction between said fifth and sixth transistor being a first output terminal; a fourth inverter comprising a series circuit of a seventh transistor which is a driving transistor and to which is applied the output of said first inverter and an eighth transistor which is a load transistor; the junction between said seventh and eighth transistors being a second output terminal; each of the load transistors in said first, second, third and fourth inverters having a terminal connected to a first power supply; each of said first and third transistors or driving transistors of said first and second inverters having a terminal connected to a second power supply; said fifth transistor or driving transistor of said third inverter having a terminal to which is applied as a power supply the output of said first inverter while said seventh transistor or driving transistor of said fourth inverter having a terminal to which is applied as a power supply the output of said second inverter; said first and third transistors having a first threshold voltage, said second and fourth transistors having a second threshold voltage, said fifth and seventh transistors having a third threshold voltage and said sixth and eighth transistors having a fourth threshold voltage; and external input signals being applied to said first and second input terminals, whereby output signals can be derived from said first and second output terminals