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Standby current detecting circuit for use in a semiconductor memory device and method thereof |
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Process and device for checking substrate wafers |
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Synchro-to-digital converter |
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Duty cycle control apparatus |
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Signal level comparing circuit |
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Circuit arrangement for correcting slip errors in pcm receivers |
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Input stage for a CTD low-pass filter
| Details |
Inventors: Benoit-Gonin, Roger; Berger, Jean L.; Fontanes, Sylvain;
Assignee: Thomson-CSF (Paris, FR)
Primary Examiner: Smith; Alfred E.
Assistant Examiner: Nussbaum; Marvin
Attorney, Agent or Firm: Plottel; Roland
An input stage for a transversal charge transfer filter, which suppresses parasitic image frequencies. It comprises two parallel channels to which the input signal is applied simultaneously. Sampling of the signal is performed in each channel with a periodicity Te, and a relative phase-shift of Te/2. The two samples are then added in order to eliminate components having periodicities in the neighborhood of Te. The present invention relates to low-pass filters using the phenomenon of electrical charge transfer occurring in a semiconductor. It relates more particularly to an input stage for this kind of CTD (Charge Transfer Device) filter, which attenuates parasitic frequencies. The design of CTD low-pass filters, often referred to as transversal filters, poses a classic problem due to the fact that the input stage is a sampling stage. In other words, when the input signal contains a component of frequency Fs close to the sampling frequency Fe, by a process of frequency mixing, two parasitic signals at the image frequencies Fe + Fs and Fe - Fs are created. Since we are concerned with a low-pass filter, the top image frequency (Fe + Fs) is automatically eliminated but the bottom image frequency (Fe - Fs) can be transmitted by the filter and appear in the output signal if the condition Fe - Fs < Fc is realised, Fc being the cut-off frequency of the low-pass filter. A well-known solution to this problem is to add to the transversal filter an associated band-stop filter for suppressing from the input signal any components whose frequencies are located between Fe - Fc and Fe + Fc. This kind of associated filter is outside the CTD filter and is generally made with the help of RC networks. The fact that it is outside the low-pass filter is a drawback especially from the point of view of bulk. A second drawback is due to the fact that the attenuation in the band which is to be stopped, is inadequate: it does not generally exceed a ratio of 4. The object of the present invention is to integrate into the input stage of a CTD transversal filter a band-stop filter designed by the application of a so-called cosine filtering method. According to the invention, there is provided an input stage for a CTD low-pass filter, comprising a semiconductor substrate, an insulating layer deposited upon the substrate, said substrate comprising at least two insulated channels, each channel receiving said input signal and comprising sampling means, said sampling means comprising a diode formed in said substrate and two sampling gates, arranged upon said insulating layer, the samples being constituted by electrical charges capable of moving through said substrate, the sampling performed in the first channel exhibiting a phase advance in relation to the sampling performed in the second channel, substantially equal to half the sampling period, said stage further comprising electrodes arranged on each of said channels after said sampling gates, in order to delay the sample formed in the first channel by a time substantially equal to said phase advance, said channels being united by a single summing electrode, extending simultaneously over the two channels and additing the samples formed in them . |
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DETAILED DESCRIPTION What is claimed is: 1. An input stage for a CTD low-pass filter, comprising a semiconductor substrate, an insulating layer deposited upon the substrate, said substrate comprising at least two insulated channels, each channel receiving said input signal and comprising sampling means, said sampling means comprising a diode formed in said substrate and two sampling gates, arranged upon said insulating layer, the samples being constituted by electrical charges capable of moving through said substrate, the sampling performed in the first channel exhibiting a phase advance in relation to the sampling performed in the second channel, substantially equal to half the sampling period, said stage further comprising electrodes arranged on each of said channels after said sampling gates, in order to delay the sample formed in the first channel by a time substantially equal to said phase advance, said channels being united by a single summing electrode, extending over the two channels. 2. An input stage as claimed in claim 1, wherein said electrodes of said first channel at least comprises a first and a second electrode supplied in antiphase with a potential whose value varies with time in accordance with a squarewave function of period equal to the sampling period, and said second channel comprises a single electrode, supplied with said potential in phase with said second electrode on said first channel, said summing electrode being supplied with said potential in phase with said electrode of said second channel. 3. An input stage for a CTD low-pass filter, comprising a plurality of elementary networks, each network being constituted by an assembly of two channels connected by a summing electrode, as claimed in claim 1, said elementary networks operating by groups of two, the networks of the same group being designed so that their summing electrodes operate in antiphase, the output of the first of the networks of the same group being connected to a delay element producing in one of said outputs a delay equal to the phase-shift between the two networks of the same group, the output of said delay element and the output of the second of the network of the same group being connected by a further summing electrode, the output of which constitutes the output of said group, the outputs of said groups being connected together, in successive stages, to form, ultimately, a single output for said plurality of elementary networks
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