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Home Fault Detection Integrated-circuit-chip-with-a-wide-I-O-memory-array-and-redundant-data-lines

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Details
Inventors: Kalter, Howard Leo; Barth, Jr., John Edward;
Assignee: International Business Machines Corporation (Armonk, NY)
Primary Examiner: Nelms; David C.
Assistant Examiner: Tran; Michael T.
Attorney, Agent or Firm: Whitham, Curtis & Whitham, Schnurmann; H. Daniel

An integrated circuit chip with RAM, a RAM macro or bit slice data logic and at least one spare array element or spare slice element and the redundancy scheme therefor. The chip includes a wide data path with a plurality of interchangeable elements such as bit slice elements or memory element and at least one more element than the number of bits in the wide data path; selection logic for deselecting defective data elements; and, switches for selectively coupling each bit of the wide I/O data path to one element or to an element adjacent the one element responsive to the selection means. The integrated circuit chip may further include drive means for selectively driving data from the switches to the element or, otherwise, passing data from the elements to the switches. The switches preferably are three-way switches, such as three CMOS pass gates.

DETAILED DESCRIPTION The present invention is an integrated circuit chip with a RAM or a RAM macro with at least one spare array element and the decode and redundancy scheme therefor.
The chip is organized such that it has a data path with a plurality of interchangeable parallel memory elements, at least one more memory element than the width of the I/O path.
It includes selection means for deselecting defective memory elements in the data path.
Switches selectively couple each bit of the I/O path to one memory element or to an adjacent memory element responsive to the selection means.
The integrated circuit chip may further include drive means for selectively driving data from the switches to the data path or otherwise passing data from the data path to the switches.
The switches are, preferably, three-way switches.
Preferably, each of the three-way switches is a three CMOS pass gate.


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