Integrated circuit memory with column voltage holding circuit

DETAILED DESCRIPTION An object of the present invention is to make an integrated circuit memory comprising a circuit that can be used to obtain a voltage at the column BL selected for the recording of a binary value that is independent of the voltage drops at the terminals of the programming and selection transistors.
According to the invention, there is proposed a non-volatile, electrically erasable programmable integrated circuit memory, said memory being organized in rows and columns of memory cells, said rows being selected by row-addressing circuits, said columns or bit lines being selected by column-addressing circuits comprising at least one series-connected selection transistor on the bit line, each bit line comprising a circuit for the programming of the binary value to be recorded, wherein said memory comprises a voltage-holding circuit the output terminal of which is connected to the bit line decoding circuit to keep the voltage of the bit line at a constant value when this bit line is selected to record a binary value.
The voltage-holding circuit comprises a differential amplifier that measures the difference between a reference voltage and a voltage representing the bit line and that gives a signal leading to reduce the difference between the reference voltage and the representative voltage, said signal being applied to the gate of a column selection transistor on the bit line.