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Integrated memory
| Details |
Inventors: Mc Connell, Roderick; Richter, Detlev;
Assignee: Siemens Aktiengesellschaft (Munich, DE)
Primary Examiner: Chung; Phung M.
Assistant Examiner:
Attorney, Agent or Firm: Lerner; Herbert L., Greenberg; Laurence A., Stemer; Werner H.
An integrated memory has a first and a second mode of operation as well as a first memory area and a second memory area. The first memory area is used to store useful data in both modes of operation. The second memory area is used in the first, but not in the second, mode of operation to store error correction data for the useful data which are to be stored in the first memory area. In the first mode of operation, the memory thus has an error correction function that is deactivated during the second mode of operation. |
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DETAILED DESCRIPTION It is accordingly an object of the invention to provide an integrated memory that overcomes the above-mentioned disadvantages of the prior art devices of this general type, which has an error correction function and can be optimized for storing data which are sensitive and insensitive to errors.
With the foregoing and other objects in view there is provided, in accordance with the invention, an integrated memory, including: a first and a second mode of operation; at least one first memory area for storing useful data in both the first and the second mode of operation; at least one second memory area for storing error correction data associated with the useful data stored in the at least one first memory area during the first mode of operation but not during the second mode of operation; and an error correction unit for producing and evaluating the error correction data stored in the at least one second memory area, the error correction unit activated during the first mode of operation and deactivated during the second mode of operation.
The integrated memory has two modes of operation and at least two memory areas.
The first memory area is used to store useful data in both modes of operation.
Useful data are the bits of a data word which are to be stored, excluding additional error correction bits or parity bits.
The second memory area is used in the first, but not in the second, mode of operation to store error correction data for useful data which are to be stored in the first memory area.
In the first mode of operation, the memory thus has an error correction function which assigns error correction data (error correction bits or parity bits), which are to be stored in the second memory area, to the useful data, which are to be stored in the first memory area.
In the second mode of operation, the useful data are stored in the first memory area without additional error correction data being stored in the second memory area.
Hence, in the second mode of operation, the error correction function of the memory is deactivated
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Fault Detection 
