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Method and apparatus for placing repeaters in a network of an integrated circuit
| Details |
Inventors: Chowdhury, Salim U.; Bearden, David Ray;
Assignee: Motorola, Inc. (Schaumburg, IL)
Primary Examiner: Smith; Matthew
Assistant Examiner: Do; Thuan
Attorney, Agent or Firm: Clingan, Jr.; James L.
A method of inserting repeaters into a network to improve timing characteristics of the network. Extraction and timing tools provide an RC network description and a slack report describing electrical and timing characteristics of a network. The timing characteristics include required arrival times of a signal generated at a source to each of the sinks of the network. A maximum slew rate is also defined at each of the sinks. Initial candidate locations for insertion of repeaters is determined. For a given set of legal repeater sizes, one or more sets of midvalue repeater sizes are determined which are used in successive approximation to identify actual repeater sizes to be considered at each of the candidate locations. At each candidate location, capacitance, required arrival time, and slew rate value (c, q, s) are determined in a bottom-up procedure. Suboptimal and invalid (c, q, s) choices at each candidate location are eliminated during successive iterations of the bottom-up procedure until the source node is reached. Further, one or more of the candidate locations are also eliminated. When the source device is reached, the (c, q, s) values are determined at the source for the given size of the source. The particular combination of (c, q, s) values at the descendant nodes relative to the source that provide a maximum q value at the source are selected, and this procedure is repeated in a top-down traversal to identify the best solution for the net for the particular repeater sizes being used. |
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DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT(S) FIG. 1 is a schematic diagram of a network or net 100 that is used to illustrate repeater insertion in accordance with the present invention. As shown, a root or source device 101 drives a signal to be received by a plurality of receivers or sinks, including sinks 103, 105, 107, 109 and 111. Signal traces 113 are routed between the source device 101 and each of the sinks 103-111 (103-111). In a practical embodiment, the signal traces 113 are often divided into a plurality of segments, where some of the segments are longer than others. For example, two segments 115 and 117 route the signal to sinks 103 and 105, respectively, where signal trace segment 115 is substantially longer than the trace segment 117. The signal traces 113 have certain physical characteristics which may be represented by resistive and capacitive (RC) components as further described below. Such characteristics cause delay and degradation of the signal asserted by the source 101. Each of the sinks 103-111 have certain timing specifications including a required arrival time, referred to as "q" relative to the source device 101 and further including a maximum allowable slew rate, referred to as S. sub. MAX, that must be met to insure proper operation of the net 100. For example, each of the sinks 103-111 may require a slew rate of several hundred picoseconds (ps) for proper operation. Also, the sink 103 may require a delay relative to the source device 101 of 200 ps whereas the sink 107 requires a signal arrival time or delay of no more than 100 ps. Although an integrated circuit (IC) designer may attempt to place the components and route the signal traces in a optimal manner, the IC may be operated at a significantly high clock rate such that the timing specifications are still not met within the net 100. For this reason, one or more repeaters may be inserted at candidate locations within the net 100 to reduce delay and to improve signal characteristics to insure that the timing specifications are met
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