 Redundant clock system utilizing nonsynchronous oscillators |
| In accordance with the present invention, there is provided a clock system with two nonsynchronized ... |
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Method and apparatus for testing a connection between digital processing modules, such as in digital printing
| Details |
Inventors: Baldwin, Steven W.; OuYang, William M.; York, James R.; Cheng, Wayne; McGarvey, Ronald E.; Perez, Ana M.; Creus, Carolina; Ulrich, Vernon W.;
Assignee: Xerox Corporation (Stamford, CT)
Primary Examiner: Decady; Albert
Assistant Examiner:
Attorney, Agent or Firm: Hutter; R.
The physical integrity of a large-scale hardware connection between two modules, such as in the context of high-speed digital printing, is tested by entering a diagnostic mode in which single-instruction handshake routines are repeatedly sent from one module to another through a parallel bus. Each handshake routine activates all of the communication lines in the bus. If a sending module does not receive the expected response to the single-instruction handshake routine within a predetermined time, the sending module causes an audible signal to be emitted. Service personnel can manually manipulate various cables, connectors, and sockets forming a hardware connection while the system is in diagnostic mode, to isolate the location of a hardware fault. |
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DETAILED DESCRIPTION We claim: 1.
A method of testing a connection between a first module and a second module, the first module and second module being intended to exchange digital information over a plurality of parallel communication lines interposed between the first module and the second module, comprising the steps of: the first module sending an initial digital instruction to the second module through at least some of the plurality of parallel communication lines; the second module responding to the initial digital instruction by sending a response instruction to the first module, the initial digital instruction and the response instruction together causing activity on all of the plurality of parallel communication lines; the first module repeating sending the initial digital instruction to the second module at a frequency of not less than ten times per second; the first module polling the second module to detect a response instruction from the second module within a first predetermined time after sending an initial digital instruction; when the first module does not receive a response instruction from the second module within the first predetermined time, the first module causing a first audible signal to be emitted; the first module polling the second module to detect a response instruction from the second module within a second predetermined time longer than the first predetermined time after sending an initial digital instruction; and when the first module does not receive a response instruction from the second module within the second predetermined time, the first module causing a second signal to be emitted, the second signal being different from the first audible signal.
2.
The method of claim 1, wherein a power line is interposed between the first module and the second module, and further comprising the steps of the first module detecting power consumption on the power line by the second module; and when the first module does not detect power consumption by the second module within the first predetermined time, the first module causing an audible signal to be emitted
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Fault Detection 
