Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home Fault Detection Method-and-apparatus-for-turbo-decoding-of-trellis-coded-modulated-signal-transmissions

 Switchable pull-ups and pull-downs for IDDQ testing of integrated circuits
OF THE INVENTION The present invention provides a switchable pull-up circuit particularly well-...


 Testing of digital-to-analog converters
In general, a technique for testing digital-to-analog converters includes providing a set of ...


 Method and apparatus for failure detection utilizing functional test vectors and scan mode
OF THE INVENTION A method and software for failure detection of logic nodes within an integrated ...


 Testing apparatus embedded in scribe line and a method thereof
The object of the present invention therefore is to provide a testing apparatus embedded in a ...


 Method and apparatus for light-controlled circuit characterization
Principles of the present invention provide light-controlled circuit characterization techniques. F...


 Method and system for instrumenting simulation models
It is therefore an object of the invention to provide a method and system for interactively ...


 Facilitating simulation of a model within a distributed environment
The shortcomings of the prior art are overcome and additional advantages are provided through the ...


 Method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions
The aforementioned and other features are accomplished, according to the present invention, by ...


 Hardware instruction scheduler for short execution unit latencies
In accordance with the present invention an apparatus for scheduling a stream of instructions per ...


 Multi-threading for a processor utilizing a replay queue
I. Introduction According to an embodiment of the present invention, a processor is provided that ...


 Method and apparatus for turbo decoding of trellis coded modulated signal transmissions

Details
Inventors: Xin, Weizhuang; Kong, Ning;
Assignee: Skyworks Solutions, Inc. (Newport Beach, CA)
Primary Examiner: Tran; Khai
Assistant Examiner:
Attorney, Agent or Firm: Rourk; Christopher J. Goodwin Gruber, L.L.P.

An implementation of an iterative decoding system within a Trellis Coded Modulation communications environment. In a disclosed embodiment of the present invention, a communication system is described wherein the transmitter uses a channel encoder (consisting of either a convolutional encoder or a block encoder) as an outer encoder. The channel encoded signal is then passed through an interleaver and provided to a Trellis Coded Modulation encoder which acts as an inner encoder. The encoded signal may then be transmitted over the channel. On the decoding side, the disclosed embodiment of the present invention advantageously applies iterative decoding steps to decode the received Trellis Coded Modulated signals, resulting in improved coding gains and a decrease in BER as compared with a conventional non-iterative approach.

DETAILED DESCRIPTION Briefly, the present invention implements an iterative decoding system within a Trellis Coded Modulation communications environment.
The improved Trellis-coded modulation transmitter and receiver system provides an improved telecommunications system capable of effectively carrying narrowband services while providing the flexibility to carry higher bandwidth services over the narrowband channel.
The present invention recognizes that the system architecture on the transmitter side of Trellis Coded Modulation communications systems can be likened to those of Serially Concatenated Convolutional Coding (SCCC) systems.
Following that recognition, the present invention applies interative Turbo decoding to Trellis Coded Modulation signals.
The present invention uses an interative process to accelerate signal decoding and increase receiver performance in a Trellis Coded Modulation environment.
In the present invention, the resulting coding gain is substantially greater and the decoding performance is substantially improved with a decrease in BER as compared with a conventional non-iterative approach.
Performance similar to SCC Turbo codes is expected.
In a disclosed embodiment of the present invention, the transmitter uses a channel encoder (consisting of either a convolutional encoder or a block encoder) as the outer encoder.
The signal to be transmitted is first input into the outer encoder.
The channel encoded signal is then passed through an interleaver and fed into a Trellis Coded Modulation encoder which acts as the inner encoder.
The encoded signal may then be transmitted over the channel.
On the decoding side, the disclosed embodiment of the present invention advantageously applies iterative decoding to decode the received Trellis Coded Modulated signals.
The iterative decoder that is used within the receiver may be similar to the decoder that is applied to Serially Concatenated Coding systems.
The system of the present invention is particularly applicable to data communications applications



Related patents
  Semiconductor integrated circuit boundary scan test with multiplexed node selection
The object of the present invention is therefore to provide a semiconductor integrated circuit having a test circuit built therein to facilitate the board test of ...
  Testing the integrity of an electrical connection to a device using an onboard controllable signal source
OF THE INVENTION The present invention is directed to systems and a method for testing the integrity of an electrical connection mounted on a circuit assembly using an ...
  Apparatus for I/O leakage self-test in an integrated circuit
According to one embodiment, an integrated circuit is disclosed that includes a first input/output (I/O) circuit and a leakage detection circuit coupled to the first I/O ...
  Mechanism for enabling compliance with the IEEE standard 1149.1 for boundary-scan designs and tests
The present invention provides a mechanism for boundary-scan design and test methodologies applicable to timing-critical high (above 200 MHz) speed clock designs, which ...
  Independent remote computer maintenance device
It is an object of the present invention to provide an independent computing device for diagnosing and repairing a host computer. It is another object of the present ...
  Method, system, and program for diagnosing a computer in a network system
OF THE PREFERRED EMBODIMENTS In the following description, reference is made to the accompanying drawings which form a part hereof and which illustrate several ...
  System and method for identifying executable diagnostic routines using machine information and diagnostic information in a computer system
FIG. 1 is a diagram illustrating an embodiment of a computer system. FIG. 1 depicts a computer system 100. Computer system 100 includes a processor 110, a chipset 120, ...
  Methods for quantitative analysis by tandem mass spectrometry
Embodiments of the present invention provide methods for deconvoluting contributions of a plurality of analytes utilizing a tandem mass spectrometry, or MS.sup.n signal. ...
  Design-for-testability method for path delay faults and test pattern generation method for path delay faults
OF THE INVENTION First Embodiment A first embodiment of the present invention relates to a design-for-testability method of changing the design of an integrated circuit ...
  Method for optimizing test development for digital circuits
The present invention provides test patterns to detect timing related failures in large digital ICs, to rapidly detect least slack paths. Such digital ICs typically ...

0.004

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved