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Method and circuitry arrangement for refreshing data stored in a dynamic MOS memory
| Details |
Inventors: Ludwig, Volker; Heitmann, Juergen;
Assignee: Siemens Aktiengesellschaft (Berlin & Munich, DE)
Primary Examiner: Fears; Terrell W.
Assistant Examiner:
Attorney, Agent or Firm: Hill, Van Santen, Steadman, Chiara & Simpson
The invention concerns a method and circuitry for refreshing data stored in a dynamic MOS memory. The refreshing processes proceed independently of data handling in the memory. The duration between successive two refreshing processes is selected such that it is smaller than a predetermined maximum duration by a duration which is associated with a memory process. When during a refreshing process, a reading process is to be executed, the reading process is delayed by means of inserted holding cycles. During execution of memory processes, the execution of a refreshing process is delayed until the memory process is concluded. In the case of a simultaneous appearance of signals which precede a refreshing process and a memory process, a decision unit determines a sequence of execution of the processes. |
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DETAILED DESCRIPTION It is an object of the invention to provide a method for the refreshing of data stored in a dynamic MOS memory, which serves as a working memory of a microcomputer system, and to which access can be had at any time by a peripheral memory. According to the invention, the problem in the case of the method of the kind previously described is solved in that the refreshing processes are carried out independently of the microcomputer; that the distributed refreshing processes proceed after in each case a duration which is shortened with respect to the predetermined duration by at least one duration which is associated to a memory process; that the execution of a reading process is delayed during a refreshing process until its conclusion; and that during a memory process, the execution of a refreshing process is delayed until the memory process is completed. The method according to the present invention has the advantage that the processing velocity of the microcomputer is reduced only slightly by the refreshing processes, since only during the reading process can a delay take place by means of a refreshing process. The method is suited in particular for use with a microcomputer which, in a duration which is larger than the duration required for a refreshing process before the introduction of a writing process, generates a corresponding writing signal when, along with the occurrence of the writing signal, a refreshing process which is just then proceeding is completely carried out and when following this, the actual writing process is carried out. Only a slight expense is required for the delay of the reading process if, with the help of a holding or standby signal, the delay of the reading process proceeds by means of a holding cycle, during which the refreshing process which is just then in progress is completed. For avoidance of a collision in time of a refreshing process and a memory process, it is advantageous if, in the case of a simultaneous appearance of signals which introduce a refreshing process and a memory process, the sequence of the execution of the processes is determined
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