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Method of controlling a self-test in a data processing system and data processing system suitable for this method
| Details |
Inventors: Dekker, Robertus W. C.;
Assignee: U.S. Philips Corporation (New York, NY)
Primary Examiner: Baker; Stephen M.
Assistant Examiner:
Attorney, Agent or Firm: Gathman; Laurie, Barschall; Anne E.
A method is described, in which a self-test is controlled in a subsystem of a data processing system. Control patterns are transported by the data processing system via a shift register and are then passed to the subsystem via connections used for normal control in the non-testing condition. A characterization of the test result is then loaded again into the shift register via connections also intended for normal use and is subsequently transported by the data processing system. A subsystem suitable for a self-test according to this method is controllable in the self-test condition from a shift register without it being necessary that it is provided with special test connections. |
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DETAILED DESCRIPTION One of the objects of the invention is to reduce the number of connections specially required for controlling tests while maintaining the uniform controllability by use of a scan circuit.
The invention further relates to a data processing system comprising: a subsystem having input connections and at least one output connections which subsystem in an operating condition responds to elements from a first collection of input patterns at the input connections, which are included as admissible pairs of input patterns directly succeeding each other in a second collection of pairs, a serial shift register provided with a parallel output for supplying the input patterns to the input connection, a detector fed by information from the shift register for controlling, in response to previously determined information, the subsystem into a self-test condition and for then supplying a test characterization at the at least one output connection for further evaluation.
According to one of its aspects, a self-test is controlled from the shift register via the parallel output and via at least part of the input connection while using a further control pattern at the input connection lying outside the defined collection.
A particular embodiment of the invention is characterized in that via at least part of the output connection, with synchronization by a predetermined succession of input patterns, the characterized result is read out.
The synchronizing control makes it possible to read out the result characterization, as the case may be, only via one connection.
Thus, connections specially intended for test output can be economized or can be rendered superfluous.
A particular embodiment of the invention is characterized in that the further control pattern is a predetermined pair of standard control patterns from the collection succeeding each other in time.
In this manner, if in itself there is no instantaneous pattern lying outside the collection of "normal" input patterns, a test control can be realized
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