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Multi-way program branching circuits
| Details |
Inventors: Disparte, Charles P.; Hall, Jr., Warren L.; Isaac, Kenneth N.; Mock, C. Howard;
Assignee: Xerox Corporation (Rochester, NY)
Primary Examiner: Zache; Raulfe B.
Assistant Examiner:
Attorney, Agent or Firm: Ralabate; James J., Colitz; Michael J., Weiss; Franklyn C.
Disclosed are methods and apparatus for multi-way program branching in a digital computer based on the contents of a data register. This is accomplished by loading any data field of interest into a data register and using the output lines as address lines to a plurality of read-only memory devices. Each device contains a set of random memory addresses. Logic circuits under program control select and enable one device, thereby producing one address. Finally, circuits under program control force a program branch to the location address produced. Thus, by programming the read-only memory devices and the computer appropriately, a plurality of sets of data fields are associated with and result in branches to a plurality of sets of locations, thereby giving the programmer the general capability of branching to any one of the plurality of locations within one instruction execution cycle based on the interrogation of any one data word. |
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DETAILED DESCRIPTION The capability of implementing multi-way branches anywhere in the program based on any data is provided by including in the central processing unit a plurality of addressable memory devices.
The data field is used to drive the address lines of these devices, the program enables one of the plurality of devices, and the output of the enabled device is used directly as the address to be branched to.
In order to keep down the number and size of addressable devices, assumptions were made.
First, the number of data bits may be limited to eight since a microcoded data field usually does not exceed eight bits in length and, in the preferred embodiment, swapping means are provided for efficiently placing the eight bits of interest into the least significant half of the sixteen bit data word.
Second, the number of address bits output from the devices need only be four bits since the microprogrammer is typically branching to one of several different locations in the same area of memory.
The microprogram itself supplies five more significant bits and two less significant bits to the address output of the devices with the result that any location within a 64 word window within a two thousand word memory may be directly addressed by any eight bits of data in any one sixteen-way branch.
A further minimization of hardware required to implement this capability is effected by using the same device for several applications in the microprogram.
That is, the same device may be used in various parts of the program by supplying different most and least significant bits from each individual subroutine while using the same four bit output from the addressable device.
Thus, in the preferred embodiment, 16 addressable devices were sufficient for 2000 words of microcode.
Providing the microprogrammer with a capability of up to sixteen-way branches on any eight bits of data results in numerous advantages.
The speed of the system is increased since a multi-way branch is much faster in execution time than the corresponding shifting and testing operations required in typical systems
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Fault Detection 
