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Same state and opposite state diagnostic test for ferroelectric memories
| Details |
Inventors: Mitra, Sanjay; Hackbarth, Holden;
Assignee: Ramtron International Corporation (Colorado Springs, CO)
Primary Examiner: Canney; Vincent P.
Assistant Examiner:
Attorney, Agent or Firm: Meza; Peter J.
A test method for ferroelectric memories includes the steps of: functionally testing the ferroelectric memories to determine functional yield; storing the ferroelectric memories for at least eight hours; writing an initial pattern into the ferroelectric memories; baking the ferroelectric memories; reading the initial pattern to determine same state yield; writing an inverse pattern into the ferroelectric memories; reading the inverse pattern to determine opposite state yield; and again writing the initial pattern into the ferroelectric memories. The steps of baking, reading the initial pattern and writing the inverse pattern, and reading the inverse pattern and writing the initial pattern are repeated for a number of test cycles. The ferroelectric memories are baked at a temperature of about 150.degree. C. for a predetermined duration that is incremented with each successive test cycle. |
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DETAILED DESCRIPTION It is, therefore, a principal object of the test method of the present invention to characterize the performance of integrated ferroelectric memories, particularly at wafer level. It is another object of the test method of the present invention to characterize both the same state and opposite state performance of a ferroelectric memory. It is an advantage of the test method of the present invention that testing time is kept to a minimum. It is another advantage of the test method of the present invention that it can be used to characterize all aspects of a ferroelectric memory including ferroelectric material composition, memory design, and integrated circuit process flow. It is yet another advantage of the test method of the present invention that memory performance may be evaluated prior to the expense and effort of assembly at package level. According to the present invention a test method for ferroelectric memories includes the steps of: functionally testing the ferroelectric memories to determine functional yield; storing the ferroelectric memories for at least eight hours; writing an initial pattern into the ferroelectric memories; baking the ferroelectric memories; reading the initial pattern to determine same state yield; writing an inverse pattern into the ferroelectric memories; reading the inverse pattern to determine opposite state yield; and again writing the initial pattern into the ferroelectric memories. The steps of baking, reading the initial pattern and writing the inverse pattern, and reading the inverse pattern and writing the initial pattern are repeated for a plurality of test cycles. Any pattern may be used initially to write to the ferroelectric memories. For example, a "checkerboard" pattern of logic ones and zeroes, a pattern of alternating rows of logic ones and logic zeroes, a pattern of alternating columns of logic ones and logic zeroes, or an entire field of either logic ones or zeroes may be initially written into the ferroelectric memories
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