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Fault Detection

Semiconductor-device-incorporating-voltage-reduction-circuit-therein

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Details

Inventors: Sanada, Kohji;
Assignee: NEC Corporation (Tokyo, JP)
Primary Examiner: Nelms; David C.
Assistant Examiner: Hoang; Huan
Attorney, Agent or Firm:

A semiconductor device is disclosed which includes a storage area such as a RAM, a register, a latch, or a flip-flop. This device further includes a test mode detection circuit for detecting a test mode and a voltage control circuit for generating a power-down voltage that is lower than a power supply voltage supplied to the device, the power-down voltage being supplied to the storage area to test a data-hold characteristic thereof in the test mode. The power supply voltage is thereby free from being changed.

DETAILED DESCRIPTION It is therefore an object of the present invention to provide an improved semiconductor device having a storage area.
It is another object of the present invention to provide a semiconductor device in which a data-hold test for a storage area incorporated therein is carried out for a short time with an accurate test resultant.
A semiconductor device according to this invention includes a storage area to be tested, a power voltage reduction circuit coupled to a power terminal supplied with a power voltage and generating a reduced voltage smaller than the power voltage, and a voltage supply circuit supplying the storage area with the power voltage in a normal operation mode and with the reduced voltage in a test mode.
Thus, the voltage actually applied to the storage area is reduced within the device.
Accordingly, test equipment is free from controlling the power voltage to be supplied to the device.
The data-hold test is thus carried out at a high speed.

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