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Fault Detection

Semiconductor-memory-device-having-flip-flop-circuits

Method of handshaking in a data communications bus

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Semiconductor memory device having flip-flop circuits

Details

Inventors: Nakano, Masao; Nakano, Tomio; Takemae, Yoshihiro; Kabashima, Katsuhiko;
Assignee: Fujitsu Limited (JP)
Primary Examiner: Fears; Terrell W.
Assistant Examiner:
Attorney, Agent or Firm: Staas and Halsey

A semiconductor memory device having flip-flop circuits, in which first and second bit lines are connected to each of the flip-flop circuits as a sense amplifier, the potential of the second bit line being opposite to the potential of the first bit line, and the first and second data bus lines cross perpendicularly to the first and second bit lines, respectively, the first and second dummy lines are arranged in parallel with the first and second data bus lines respectively, in order to prevent erroneous operation of an I/O amplifier connected to the first and second data bus lines.

DETAILED DESCRIPTION In order to solve the above explained problems of prior art semiconductor memory devices having flip-flop circuits, the present invention has as an object the provision of a dummy line which is arranged to cross the bit lines in parallel with the data bus lines.
The principal object of the present invention is to prevent the erroneous operation of a semiconductor memory device having flip-flop circuits due to the noise induced in the data bus and to ensure the correct reading-out of the stored information.

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