Semiconductor memory device improved for externally designating operation mode

DETAILED DESCRIPTION An object of the present invention is to provide a semiconductor memory device in which a timing of change of an external control signal generated for designating an operation mode is less limited.
It is another object of the present invention to provide a dynamic random access memory in which a timing of change of an external control signal generated for designating an operation mode is less limited.
It is a further object of the present invention to provide a dynamic random access memory in which a timing of change of a row address strobe signal generated for externally designating a self refresh mode is less limited.
In brief, a semiconductor memory device in accordance with the present invention comprises a cycle time comparison circuit which compares a time period of one cycle of an externally applied control signal with a time period of a predetermined memory cycle and a circuit operating the semiconductor memory device in either a first or a second operation mode in response to the result of the comparison.
In operation, the designation of the first or second operation mode is detected in response to the time period of one cycle of the externally applied control signal.
If the control signal changes within one cycle, it is not restricted by the timing of change of a signal level when the operation mode is designated.
Referring to a preferred embodiment, the semiconductor memory device comprises a dynamic random access memory device.
When a time period of one cycle of a row address strobe signals detected, it is determined that the self refresh mode was externally designated.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.