Semiconductor memory with a multiplexer for selecting an output for a redundant memory access

DETAILED DESCRIPTION The invention may be incorporated into an integrated circuit memory with redundant memory cells, by way of a circuit that controls the coupling of a redundant sense amplifier to a selected input/output terminal responsive to a received address value.
A redundant multiplexer circuit is associated with each input/output terminal and with several redundant elements, such as columns.
The redundant multiplexer receives a select signal from the redundant decoders for each of its associated redundant columns, and has a fuse for each redundant column; the fuses for the redundant columns which are to communicate with the input/output terminal remain intact, while the others are opened.
Responsive to receiving a select signal for one of its enabled columns (i.
e.
, the received address value matches that programmed for a column which is to communicate with the input/output terminal), the redundant multiplexer issues a gating signal to place the redundant sense amplifier in communication with the appropriate output driver.
If multiple redundant sense amplifiers are provided, each input/output terminal has a redundant multiplexer for each of the multiple redundant sense amplifiers.