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Home Fault Detection Semiconductor-memory-with-segmented-word-lines

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 Semiconductor memory with segmented word lines

Details
Inventors: Nakajima, Tetsuya; Nagahara, Masaki;
Assignee: Fujitsu Limited (Kawasaki, JP)
Primary Examiner: Hecker; Stuart N.
Assistant Examiner: Gossage; Glenn A.
Attorney, Agent or Firm: Staas & Halsey

A semiconductor memory device including at least word lines and bit lines with memory cells located at each cross point therebetween. Each of the word lines is divided to form segmented word lines and each of the word line segments is driven by an individual private word driver. The individual private word drivers are activated together in response to a word selection signal. Level shifting diodes are employed in the bit line drivers to offset a voltage level change caused by the segment word drivers.

DETAILED DESCRIPTION It is an object of the present invention to provide a semiconductor memory device, particularly an ECL-type S.
RAM, which can reduce the current density of wiring, even for narrow-width wiring used in miniaturized memories.
Consideration is given to reducing the current density of all word lines of a memory since there is considerable likelihood of electromigration in each word line due to their inherent roles.
Each word line is divided into a plurality of segmented word lines.
Each segmented word line is connected to an individual word driver and provided with memory cells, etc.
Each of the segmented word lines carries an individual word current from an individual word driver when the word line is in a selection state.


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