Signal level comparing circuit

DETAILED DESCRIPTION It is accordingly an object of this invention to provide a signal level comparing circuit which can process an input signal whose maximum voltage level stands higher than the voltage of an operation power source.
To attain the above-mentioned object, this invention provides a signal level comparing circuit which comprises first and second input terminals to be respectively set at first and second prescribed potentials; signal level comparing means actuated by a power source voltage impressed between the first and second input terminals, the first input terminal of the signal level comparing means being held at a reference potential lying between the first and second prescribed potentials; first to third resistive means which are connected to a second input terminal of the signal level comparing means at one end thereof; a signal input terminal connected to the other end of the first resistive means; and first and second switching means respectively connected to the other ends of the second and third resistive means.