Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home Fault Detection Tamper-resistant-methods-and-apparatus

 Multilevel security port methods, apparatuses, and computer program products
According to the present invention, multilevel trusted systems associate multiple port endpoints ...


 Differential current-switch circuit, D/A conversion circuit and method of transient response reduction
Accordingly, an object of the present invention is to provide a differential current-switch circuit,...


 Java security mechanism
In accordance with the invention, objects of classes loaded from the hard drive of a local client ...


 Switching system comprising distributed elements allowing attachment to line adapters, and having multicasting capabilities
OF THE PREFERRED EMBODIMENT With respect to FIGS. 2 and 3, there is illustrated the switching ...


 High speed current switch
OF THE INVENTION Referring to FIG. 4, a schematic diagram of a high-speed current switch 36 is ...


 Embedding certifications in executable files for network transmission
The Internet is a well known, global network of cooperatively interconnected computer networks. The ...


 Method and system for secure running of untrusted content
Briefly, the present invention provides restricted execution contexts for untrusted content (such ...


 Cross module representation of heterogeneous programs
The above-mentioned shortcomings, disadvantages and problems are addressed by the present invention,...


 Method and device for providing hidden storage in non-volatile memory
Techniques for implementing hidden storage in a non-volatile memory storage are disclosed. As will ...


 Protected control of devices by user applications in multiprogramming environments
OF THE INVENTION The disclosure of provisional patent application No. 60/079,356 filed Mar. 25, 199...


 Tamper resistant methods and apparatus

Details
Inventors: Aucsmith, David; Graunke, Gary;
Assignee: Intel Corporation (Santa Clara, CA)
Primary Examiner: Decady; Albert
Assistant Examiner:
Attorney, Agent or Firm: Blakely, Sokoloff, Taylor & Zafman LLP

In accordance with a first aspect of the present invention, a security sensitive program that operates with a secret is made tamper resistant by distributing the secret in space as well as in time. In accordance with a second aspect of the present invention, a security sensitive program is made tamper resistant by obfuscating the program. In accordance with a third aspect of the present invention, a security sensitive application is made tamper resistant by isolating its security sensitive functions, and making the isolated security sensitive functions tamper resistant by distributing the secrets of the security sensitive functions in time as well as in space, and/or obfuscating the security sensitive functions. In one embodiment where obfuscation is employed, the pseudo-randomly selected pattern(s) of mutations is (are) unique for each installation. In accordance with a fourth aspect of the present invention, a security sensitive system with security sensitive applications is made further tamper resistant by deploying an interlocking trust mechanism. In accordance with a fifth aspect of the present invention, a content industry association, in conjunction with content manufacturers, content reader manufacturers, and content player manufacturers of the industry jointly implement a coordinated encryption/decryption scheme, with the player apparatus manufactured by the content player manufacturers employing playing software that include tamper resistant decryption functions.

DETAILED DESCRIPTION OF THE INVENTION In the following description, various aspects of the present invention will be described.
However, it will be apparent to those skilled in the art that the present invention may be practiced with only some or all aspects of the present invention.
For purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the present invention.
However, it will also be apparent to one skilled in the art that the present invention may be practiced without the specific details.
In other instances, well known features are omitted or simplified in order not to obscure the present invention.
Parts of the description will be presented in terms of operations performed by a computer system, using terms such as data, flags, bits, values, characters, strings, numbers and the like, consistent with the manner commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art.
As well understood by those skilled in the art, these quantities take the form of electrical, magnetic, or optical signals capable of being stored, transferred, combined, and otherwise manipulated through mechanical and electrical components of the computer system; and the term computer system include general purpose as well as special purpose data processing machines, systems, and the like, that are standalone, adjunct or embedded.
Various operations will be described as multiple discrete steps in turn in a manner that is most helpful in understanding the present invention, however, the order of description should not be construed as to imply that these operations are necessarily order dependent, in particular, the order of presentation.
Referring now to FIG.
1, a block diagram illustrating a first aspect of the present invention is shown.
In accordance with this first aspect of the present invention, security sensitive program 100 is made tamper resistant by distributing its secret in space as well as in time



Related patents
  Method for monitoring telephone call progress
It is a primary object of the present invention to provide a system and method for detecting and discriminating audio signals and particularly signals indicative of the ...
  Telephone updating via network provided information
An object of the present invention is to provide a communication terminal apparatus in which, when the telephone number of a party to communication has changed or missed,...
  Programming model for a coprocessor on a computer system
OF THE PREFERRED EMBODIMENT A method and apparatus for controlling a coprocessor, namely a digital signal processor in a computer system, is described. In the following ...
  Method of dynamically adjusting NCP program memory allocation of SNA network
A method in accordance with the invention is implemented via a novel computer program referred to for convenience as NEWPROG. NEWPROG resides (executes) in one or more ...
  Method for debugging in a parallel computer system and system for the same
The present invention solves the above-described problems, and therefore has an object to provide a method and system for sequentially executing programs which are ...
  Arithmetic operation processing apparatus of the parallel processing type and compiler which is used in this apparatus
It is an object of the present invention to provide an arithmetic operation processing apparatus of the parallel arithmetic operating type in which the additional ...
  System for inserting constructs into compiled code, defining scoping of common blocks and dynamically binding common blocks to tasks
We claim: 1. A computer implemented method performed within a multi-processing, multi-programming computer environment for reducing conflict among tasks concurrently ...
  Determining a communication schedule between processors
To achieve the aforementioned objectives, a first aspect of the invention provides a method of determining a communication schedule in the case where data communication ...
  Persistent/impervious event forwarding discriminator
It is an object of this invention to provide an EFD that is persistent in the face of catastrophic failures in the system and impervious to security breaches by rogue OSI...
  Method and apparatus for controlling network and workstation access prior to workstation boot
The present invention is directed to a method and apparatus for preboot file and information transfer between workstations and other workstations or workstations and ...

0.014

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved