Hardware instruction scheduler for short execution unit latencies
In accordance with the present invention an apparatus for scheduling a stream of instructions per cycle of the apparatus includes means for scheduling a stream of instructions for execution by providi... Read More
Inventors: Sager, David J.; Saxe, James Benjamin;, Assignee: |
Multi-threading for a processor utilizing a replay queue
I. Introduction According to an embodiment of the present invention, a processor is provided that speculatively schedules instructions for execution and includes a replay system. Speculative scheduli... Read More
Inventors: Merchant, Amit A.; Boggs, Darrell D.; Sager, David J.;, Assignee: Intel Corporation (Santa Clara, CA) |
Checkpointing of register file
The invention in one aspect includes methodology to perform an extra read from a register file prior to writing to that register file. The data from the extra read is stored in a buffer (e.g., another... Read More
Inventors: DeLano, Eric;, Assignee: Hewlett-Packard Development Company, L.P. (Houston, TX) |
Data synchronization of multiple remote storage
The present invention provides a method, and architecture for implementing that method, of synchronizing two or more remote or remote data storage facilities so that they hold and maintain the same da... Read More
Inventors: Watanabe, Naoki;, Assignee: Hitachi, Ltd. (JP) |
Method for snooping raid 1 read transactions by a storage device
A target device snooping method, according to one embodiment of the present invention, minimizes the utilization problems of a host system and an initiator associated with prior art RAID 1 mirroring, ... Read More
Inventors: Young, B. Arlen;, Assignee: Adaptec, Inc. (Milpitas, CA) |
Method and apparatus for content distribution via non-homogeneous access networks
The invention provides a method and apparatus that is capable of streaming content to different types of access networks in an interactive information distribution system. The method initially receive... Read More
Inventors: Son, Yong Ho; Goode, Christopher W. B.;, Assignee: Sedna Patent Services, LLC (Philadelphia, PA) |
Code error detecting method
It is therefore an object of the present invention to provide an error detection method of detecting a code error in a data file employing an optical disk in which, during a reproducing operation, an ... Read More
Inventors: Shimbo, Masatoshi; Kurosawa, Katsuhiro;, Assignee: Matsushita Electric Industrial Co., Ltd. (Osaka, JP) |
Information recording medium and information record regenerating device therefor
An object of the present invention is to provide a recording medium and an error correcting method where the burst error correcting capability and the reliability of recording data can be improved, an... Read More
Inventors: Hoshino, Takashi;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Optical disk apparatus having error correction circuit
OF THE INVENTION There will now be described an embodiment of this invention with reference to the accompanying drawings. FIG. 1 shows an optical disk apparatus of this invention. A disk motor 101 dr... Read More
Inventors: Wakabayashi, Haruo;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Method and apparatus for distinguishing control channel from traffic channels
It is accordingly an object of the present invention to speed up the process of discriminating between traffic and control channels in a received signal. Another object of the invention is to confirm ... Read More
Inventors: Abe, Masami;, Assignee: Oki Electric Industry Co., Ltd. (Tokyo, JP) |
Method for predicting a fill-up level of a buffer in an ATM network element
Hence, it is an object of the present invention to provide an improved method for predicting a fill-up level of a buffer in an ATM network element, and also to provide an improved method for connectio... Read More
Inventors: Saari, Jarmo;, Assignee: Nokia Corporation (Espoo, FI) |
DSL modem utilizing low density parity check codes
It is therefore an object of the invention to provide simple methods of generating reproducible H matrices. It is another object of the invention to provide DSL modems which utilize simply generated r... Read More
Inventors: Goldstein, Yuri; Okunev, Yuri; Drucker, Vitaly;, Assignee: PC Tel Inc. (Milipitas, CA) |
Structured document management system, structured document management method, search device and search method
The present invention has been made in view of the above circumstances and provides a structured document management system and a structured document management method which can efficiently handle a l... Read More
Inventors: Numata, Kenichi; Kawabe, Shigehisa; Nukaga, Masao; Yamada, Toshifumi; Ikeda, Minoru; Higashi, Kazuhiko; Yamada, Miho;, Assignee: Fuji Xerox Co., Ltd. (Tokyo, JP) |
High speed read/modify/write memory system and method
One form of the present invention is an improvement for a data processing system. The improvement comprises a memory for storing data elements, a first cache register connected to the memory, and a se... Read More
Inventors: Curry, Jr., James C.;, Assignee: NCR Corporation (Dayton, OH) |
Methods and apparatus for caching a location index in a data storage system
Aspects of the present invention relate to improved techniques for accessing content in a storage system. In accordance with one embodiment of the present invention, the storage system may provide hi... Read More
Inventors: Kilian, Michael; Todd, Stephen;, Assignee: |
Method and apparatus for correcting data errors
Broadly speaking, the present invention relates to an error correcting method and apparatus which shortens the time needed to perform error correction using a buffer memory. The present invention can ... Read More
Inventors: Yamawaki, Hirofumi; Yamawaki, Masashi; Yamakura, Kenichi;, Assignee: Fujitsu Limited (Kawasaki, JP) |
Method and apparatus for enhancing data rate in processing ECC product-coded data arrays in DVD storage subsystems and the like
What is claimed is: 1. A machine-implementable method for enhancing the data transfer rate in an arrangement formed by an ECC processor coupling a first memory, said arrangement detecting and correcti... Read More
Inventors: Michigami, Toru; Tanaka, Keisuke;, Assignee: International Business Machines Corporation (Armonk, NY) |
Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method
OF THE INVENTION Hereinafter, referring to the accompanying drawings, embodiments of the present invention will be explained. In a structure of an error-correcting information data block in which an ... Read More
Inventors: Kojima, Tadashi;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Method for testing integrated circuits having a grid-based, "cross-check" t e
The present invention is a new test structure which allows up to 100 percent electrical testing of Very Large Scale Integrated Circuits by the addition of an array of test-points in the Integrated Cir... Read More
Inventors: Gheewala, Tushar R.;, Assignee: Cross-Check Technology, Inc. (San Jose, CA) |
Serial scan chain architecture for a data processing system and method of operation
What is claimed is: 1. A data processor having a scan chain architecture, the scan chain architecture comprising: a plurality of scan chains wherein each scan chain in the plurality of scan chains has... Read More
Inventors: Crouch, Alfred L.; Pressly, Matthew D.; Circello, Joseph C.; Duerden, Richard;, Assignee: Motorola Inc. (Schaumburg, IL) |
Hierarchically managed boundary-scan testable module and method
OF THE DRAWINGS FIG. 1 is a block diagram of electronic system 10 that accommodates JTAG testing through the use of a hierarchically managed testable module 12. System 10 includes tester 14 and any n... Read More
Inventors: Handly, Paul Robert; Deitrich, Brian Lee; Yockey, Robert Francis;, Assignee: Motorola, Inc. (Schaumburg, IL) |
Multiple BIST controllers for testing multiple embedded memory arrays
The present invention generally relates to various models representing at least a portion of a semiconductor device and various semiconductor devices. In accordance with a particular embodiment, the m... Read More
Inventors: Crouch, Alfred Larry; McKeown, Jennifer Lynn; Shepard, Clark Gilson;, Assignee: Motorola, Inc. (Schaumburg, IL) |
Boundary scan latch configuration for generalized scan designs
The present invention relates generally to a boundary design of a chip. More particularly, the present invention relates to a boundary scan latch configuration for generalized scan designs in a single... Read More
Inventors: Douskey, Steven Michael; Ganfield, Paul Allen; Young, Daniel Guy;, Assignee: International Business Machines Corporation (Armonk, NY) |
RAM memory circuit having a plurality of banks and an auxiliary device for testing
One aspect of the invention is directed to designing a RAM memory circuit provided with a plurality of memory banks such that the circuit may be tested in a shorter time than hitherto. Accordingly, on... Read More
Inventors: Boldt, Sven; Pfeiffer, Johann;, Assignee: Infineon Technologies AG (Munich, DE) |
Apparatus for testing an interconnecting logic fabric
According to the present invention, test circuitry and operational methods that are formed within an FPGA device are to support the testing of embedded fixed logic core devices as well as fixed logic ... Read More
Inventors: Herron, Nigel G.; Thorne, Eric J.; Wang, Qingqi;, Assignee: Xilinx, Inc. (San Jose, CA) |
Radio channel control apparatus used in a CDMA cellular system and capable of changing cell size
It is therefore an object of this invention to provide a radio channel control apparatus capable of changing a size of a cell. It is another object of this invention to provide a radio channel control... Read More
Inventors: Kanai, Toshihito;, Assignee: NEC Corporation (Tokyo, JP) |
Multiple satellite repeater management system using frame error rate for diversity selection
The foregoing and other problems are overcome and the objects of the invention are realized by methods and apparatus in accordance with embodiments of this invention. Disclosed herein is a a mobile sa... Read More
Inventors: Wiedeman, Robert A.; Monte, Paul A.; Penwarden, Kent A.;, Assignee: Globalstar L.P. (San Jose, CA) |
Adaptive power control in wideband CDMA cellular systems (WCDMA) and methods of operation
I claim: 1. A Wide-band Code Division Multiple Access ("WCDMA") system comprising: a base station and a mobile station; a first channel including a baseband signal having a variable transmission rate ... Read More
Inventors: Sadri, Ali S.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Link-quality estimation method and components for multi-user wireless communication systems
OF THE PREFERRED EMBODIMENT(S) The present invention is directed to wireless communication systems and the processing of received communications signals to facilitate the transmission and reception o... Read More
Inventors: Reznik, Alexander;, Assignee: InterDigital Technology Corporation (Wilmington, DE) |
Transmission power control method and transmission power control apparatus in mobile communication system
1. A transmission power control method characterized in that: reception quality of a signal transmitted from a remote station is compared with a control target value, and the comparison result is used... Read More
Inventors: Hamabe, Kojiro;, Assignee: NEC Corporation (Tokyo, JP) |
Fault Detection 
