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Latest patents Results: 61-90 of 1854
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Drilling restart control system
It is therefore an object of the present invention to provide a drilling restart control system of an NC drilling machine which can rapidly achieve the restarting of the machining after a temporary in... Read More
Inventors: Hamaya, Yasuhiko;, Assignee: NEC Corporation (Tokyo, JP)
Method and apparatus for automatically correcting errors detected in a memory subsystem
An apparatus and method for correcting corrupted data are disclosed. Access logic is provided to access a memory. For each data value output by the memory, error detection logic generates an error sig... Read More
Inventors: Von Bokern, Vincent; Bogin, Zohar; Freker, David;, Assignee: Intel Corporation (Santa Clara, CA)
Replacement data error detector
A cache is described which includes an error circuit for detecting errors in the replacement data. If an error is detected, the cache may update the replacement data to eliminate the error. For exampl... Read More
Inventors: Supnet, Erik P.;, Assignee: Broadcom Corporation (Irvine, CA)
Soft error detection in high speed microprocessors
The present invention provides aspects for soft error detection for a superscalar microprocessor. The aspects include a first pipeline, the first pipeline including a first arithmetic logic unit, ALU,... Read More
Inventors: Jordan, Paul J.; Klim, Peter J.;, Assignee: International Business Machines Corporation (Armonk, NY)
Semiconductor integrated circuit device, manufacturing method thereof, and driving method for the same
To solve the above-described problems, the present invention employs the below-mentioned means. As a first means, means for storing therein trimming data, means for reading the trimming data, and mean... Read More
Inventors: Kubo, Kazuaki; Endo, Youichi; Miyagi, Masanori;, Assignee: Seiko Instruments Inc. (JP)
Integration of security modules on an integrated circuit
In accordance with the preferred embodiment of the present invention, an integrated circuit includes secure logic that requires protection. Secure assurance logic protects the secure logic. The secure... Read More
Inventors: Buer, Mark Leonard;, Assignee: Koninklijke Philips Electronics N.V. (Eindhoven, NL)
Method and system for storing device test information on a semiconductor device using on-device logic for determination of test results
OF THE INVENTION A schematic diagram of an embodiment of the present invention is shown in FIG. 1. An integrated circuit device is indicated at 1, and the integrated circuit device tester used for te... Read More
Inventors: McBride, Jerry D.;, Assignee: Micron Technology, Inc. (Boise, ID)
Semiconductor memory with a multiplexer for selecting an output for a redundant memory access
The invention may be incorporated into an integrated circuit memory with redundant memory cells, by way of a circuit that controls the coupling of a redundant sense amplifier to a selected input/outpu... Read More
Inventors: McClure, David C.;, Assignee: SGS-Thomson Microelectronics, Inc. (Carrollton, TX)
Method and apparatus for inhibiting a predecoder when selecting a redundant row line
One aspect of the invention comprises a circuit for replacing a defective signal path of a plurality of like signal paths with a redundant signal path. The circuit comprises a redundant decoder progra... Read More
Inventors: Kersh, III, David V.; Norwood, Roger D.;, Assignee: Texas Instruments Incorporated (Dallas, TX)
Random access memory having a flexible array redundancy scheme
The present invention is a wide I/O Random Access Memory (RAM) and the architecture and redundancy scheme, therefor. If the RAM is large, it is divided into units. For each unit, or for smaller RAMs, ... Read More
Inventors: Kirihata, Toshiaki; Watanabe, Yohji;, Assignee: International Business Machines Corporation (Armonk, NY)
Integrated circuit chip with a wide I/O memory array and redundant data lines
The present invention is an integrated circuit chip with a RAM or a RAM macro with at least one spare array element and the decode and redundancy scheme therefor. The chip is organized such that it ha... Read More
Inventors: Kalter, Howard Leo; Barth, Jr., John Edward;, Assignee: International Business Machines Corporation (Armonk, NY)
Improved logic cell array using CMOS E.sup.2 PROM cells
OF ILLUSTRATIVE EMBODIMENT Referring now to the drawings, FIG. 1 is a schematic block diagram of a logic cell array. As described by Landry, supra, one commercially-available logic cell array compris... Read More
Inventors: Brahmbhatt, Dhaval J.;, Assignee: ICT International CMOS Technology, Inc. (San Jose, CA)
DRAM architecture having distributed address decoding and timing control
The previously mentioned needs are fulfilled with the present invention. In one form, a DRAM and method is provided having an architecture with both distributed decoding and timing control. A pluralit... Read More
Inventors: Morton, Bruce L.;, Assignee: Motorola, Inc. (Schaumburg, IL)
Memory with page mode
We claim: 1. In a memory comprising first and second arrays, each array comprising a plurality f memory cells arranged into rows and columns, each of said rows having a respective binary address, a me... Read More
Inventors: Bates, Matthew D.; Gay, Adrian C.; West, Roderick M.; Williams, Todd;, Assignee: International Business Machines Corporation (Armonk, NY)
Method and apparatus for identifying and repairing mismatched data
According to one embodiment of the present invention, a method of determining if a data coherence problem exists in a storage system is disclosed. According to this embodiment, a data unit format valu... Read More
Inventors: Kedem, Ishay;, Assignee: EMC Corporation (Hopkinton, MA)
Testing system for local subscribers
Therefore, in view of the above problem, the object of the present invention is the provision of a test system for local subscribers, by which the issue of an unnecessary alarm signal is avoided. To a... Read More
Inventors: Ishioka, Yuzuru;, Assignee: Fujitsu Limited (Kanagawa, JP)
Device for inducing a wink in a telephone system
It is accordingly an object of the present invention to overcome the drawbacks of the prior art. It is accordingly a further object of the invention to provide a portable unit which can acknowledge re... Read More
Inventors: Olson, Gregory David;, Assignee: Southwestern Bell Telephone Company (San Antonio, TX)
Apparatus and method for interfacing host computer and computer nodes using redundant gateway data lists of accessible computer node data
The present invention is directed toward an interface between add-on programs (or the host processor on which the programs are executed) and a network of working computer nodes of a process system. Sp... Read More
Inventors: Middledorp, Frans M.; Fournier, Allan P.;, Assignee: The Foxboro Company (Foxboro, MA)
Chassis fault tolerant system management bus architecture for a networking
The present invention overcomes the disadvantages of the prior art by providing a fault tolerant system management bus architecture for a networking chassis. The architecture provides a primary path f... Read More
Inventors: Fee, Brendan; Oliver, Chris;, Assignee:
Remote token ring beacon station detection and isolation
From the foregoing it can be appreciated that it would be desirable to provide a method and apparatus suitable for detecting and isolating beaconing stations in a token ring network wherein the agent ... Read More
Inventors: Sha, Yufen; Kutzler, Kenrick;, Assignee: SynOptics Communications, Inc. (Santa Clara, CA)
Management of path routing in packet communications networks
In accordance with the illustrative embodiment of the present invention, a path management system is provided which provides central management of connection routing in systems having a limited protoc... Read More
Inventors: Arrowood, Andrew Hilliard; Carriker, Jr., Charles A.; Magnuson, Anne Siegman; McClernan, Sharon Marie; Petri, Laura Marie; Temoshenko, Leo;, Assignee: International Business Machines Corporation (Armonk, NY)
Apparatus and methods for providing fault tolerance of networks and network interface cards
A middleware approach provides network fault tolerance over conventional Ethernet networks. The networks have a plurality of nodes desiring to transmit packets of data. Nodes of the fault-tolerant net... Read More
Inventors: Huang, Jiandong; Li, Ling; Song, Sejun;, Assignee: Honeywell International Inc. (Morristown, NJ)
Information recording medium, information recording method and information recording/reproduction system
According to one aspect of this invention, an information recording medium including a plurality of sectors includes: a first spare area including a spare sector for replacing a defective sector among... Read More
Inventors: Gotoh, Yoshiho; Ito, Motoshi; Ueda, Hiroshi; Fukushima, Yoshihisa;, Assignee: Matsushita Electric Industrial Co., Ltd. (Kadoma, JP)
Computer server with improved reliability, availability and serviceability
OF THE PREFERRED EMBODIMENT The present invention is an apparatus and method for monitoring and controlling the internal state of a PC server. In the following detailed description, numerous specific... Read More
Inventors: Kini, Vittal;, Assignee: Intel Corporation (Santa Clara, CA)
Method and apparatus for measuring the performance of a network based application program
A client-server software performance monitor system is disclosed. In the system of the present invention, a performance monitor machine is coupled to a computer network in close network proximity to o... Read More
Inventors: Wang, George R.;, Assignee: Keynote Systems, Inc. (San Mateo, CA)
Carrier-grade SNMP interface for fault monitoring
An object of the present invention is to provide a system for enabling carrier-grade reliable fault monitoring using a simple, inherently unreliable management protocol such as SNMP by incorporating t... Read More
Inventors: Sundaram, Shobana S.; Liu, Jingdong;, Assignee: Nortel Networks Limited (Montreal, CA)
Screening methodology for operating system error reporting
A method and apparatus is provided for monitoring the operating condition of processing resources within an information processing system. The processing resources are monitored and indicia are provid... Read More
Inventors: Hamilton, II, Rick Allen; Mehta, Chet; Upton, John Daniel;, Assignee: International Business Machines Corporation (Armonk, NY)
System for real-time monitor and response
The system of the present invention is divided into three tiers: data gathering, processing and operator interface. Although the three tiers are interrelated to form the system, each of the three tier... Read More
Inventors: Grinter, Richard C.; Alvarez, David;, Assignee: On Guard Plus (Surrey, GB)
B-ISDN access
According to the present invention there is provided a Broadband-Integrated Services Digital (B-ISDN) access network using Asynchronous Transfer Mode (ATM) technology where a Concentration Function is... Read More
Inventors: Arnold, John S;, Assignee: Marconi Communications Limited (Coventry, GB)
Communication control method in mobile communication system and base station used therefor
An object of the present invention is to provide the communication control method in the mobile communication system and the base station and a record medium used therefor, wherein, in the case where ... Read More
Inventors: Hamabe, Kojiro;, Assignee: NEC Corporation (Tokyo, JP)
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