TFO resynchronization system
An embodiment of the invention provides a method of maintaining synchronization of an inband signaling system comprising the steps of: collecting inband signaling information from samples in a signali... Read More
Inventors: Hoppes, Brian R.;, Assignee: Tellabs Operations, Inc. (Naperville, IL) |
Optical data bus having a statistical access method
In an optical data bus of the above species, the object of the present invention is to obtain, particularly with CSMA/CD access methods, the most simple as possible control circuits for the communicat... Read More
Inventors: Bodlaj, Viktor; Moustakas, Steven; Witte, Hans-Hermann;, Assignee: Siemens Aktiengesellschaft (Berlin and Munich, DE) |
Device for differential-mode information transmission between at least two elements of a motor vehicle
The object of the invention is thus to resolve these problems by proposing an information transmission device which is simple, reliable and makes it possible to ensure adequate information transmissio... Read More
Inventors: Lecoco, Jean-Luc; Magne, Pierre;, Assignee: Automobiles Peugeot (Paris, FR); Automobiles Citroen (Neuilly-sur-Seine, FR); Regie Nationale des Usines Renault (Boulogne Billancourt, FR) |
Circuit and method for signal transmission
Bearing in mind the above-described problems with the prior art techniques, the present invention was made. Accordingly, it is an object of the present invention to provide an improved signal transmis... Read More
Inventors: Yamauchi, Hiroyuki;, Assignee: Matsushita Electric Industrial Co., Ltd. (Osaka, JP) |
Non-volatile RAM cell with enhanced conduction insulators
What is claimed is: 1. A memory system comprising; a semiconductor substrate, a volatile memory cell having a data node formed in said substrate, a non-volatile device including: a floating gate capac... Read More
Inventors: Bertin, Claude L.; Kotecha, Harish N.; Wiedman, Francis W.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Target location systems
What we claim is: 1. A target location system comprising a signal transmitter including a pair of signal transmitter transducers arranged in spaced apart relationship, means for driving the transducer... Read More
Inventors: Johnson, Phillip L. M.;, Assignee: Plessey Handel und Investments AG (CH) |
Multiple bit output dynamic random-access memory
An improvement for a dynamic random-access memory which includes memory cells coupled to sense amplifiers by bit lines is described. The memory includes a digital counter for selecting cells in the ar... Read More
Inventors: Reese, Edmund A.; Spaderna, Dieter W.; Flannagan, Stephen T.;, Assignee: Intel Corporation (Santa Clara, CA) |
Autonomous N-modular redundant fault tolerant clock system
In accordance with the present invention, a fault tolerant clock system comprises a first set of fault containment regions that include a plurality of clock units, all of which produce an output time ... Read More
Inventors: Bond, David G.; Hill, Todd; Weis, Paul D.; Woods, John R.;, Assignee: The Boeing Company (Seattle, WA) |
Expandable digital error detection and correction device
What is claimed is: 1. An error detection and correction device (300) comprising in combination: a first device bus (310); a second device bus (312); a third device bus (318); a fourth device bus (314... Read More
Inventors: Miller, Michael J.; Chan, Andy P.; Stodieck, Robert W.; Mick, John R.;, Assignee: Integrated Device Technology, Inc. (Santa Clara, CA) |
Automated safestore stack generation and move in a fault tolerant central processor
What is claimed is: 1. A fault tolerant central processing unit comprising: A) data manipulation circuitry including a plurality of software visible registers, each said software visible register temp... Read More
Inventors: Wilhite, John E.; Lange, Ronald E.;, Assignee: Bull HN Informations Systems Inc. (Billerica, MA) |
Method and circuitry arrangement for refreshing data stored in a dynamic MOS memory
It is an object of the invention to provide a method for the refreshing of data stored in a dynamic MOS memory, which serves as a working memory of a microcomputer system, and to which access can be h... Read More
Inventors: Ludwig, Volker; Heitmann, Juergen;, Assignee: Siemens Aktiengesellschaft (Berlin & Munich, DE) |
Refresh operation control circuit for semiconductor device
An object of this invention is to provide a simple practical circuit to manage and control the timing of refresh such that the refresh operation is automatically carried out in the idle time of normal... Read More
Inventors: Sawada, Kazuhiro; Sakurai, Takayasu; Nogami, Kazutaka;, Assignee: Kabushiki Kaisha Toshiba (Kanagawa, JP) |
Dynamic random access memory device with staggered refresh
One object of the present invention is to reduce a peak value of a current consumed in the DRAM in the refresh operation. Another object of the present invention is to reduce a peak value of a current... Read More
Inventors: Mashiko, Koichiro;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Semiconductor memory device improved for externally designating operation mode
An object of the present invention is to provide a semiconductor memory device in which a timing of change of an external control signal generated for designating an operation mode is less limited. It... Read More
Inventors: Kumanoya, Masaki; Dosaka, Katsumi; Konishi, Yasuhiro; Komatsu, Takahiro; Tobita, Youichi;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Multiple bit error detection and correction system employing a modified Reed-Solomon code incorporating address parity and catastrophic failure detection
Accordingly, it is a primary objective of the present invention to provide an error correction and detection technique for semiconductor memory arrays which processes a data word from memory, in paral... Read More
Inventors: Smelser, Donald W.;, Assignee: Digital Equipment Corporation (Maynard, MA) |
Integrated circuit I/O using a high performance bus interface
The present invention is designed to provide a high speed, multiplexed bus for communication between processing devices and memory devices and to provide devices adapted for use in the bus system. Th... Read More
Inventors: Farmwald, Michael; Horowitz, Mark;, Assignee: Rambus, Inc. (Mountain View, CA) |
Memory defect masking device
Therefore, the main objective of the present invention is to provide a memory defect masking device to be used in combination with a plurality of memory devices which is capable of replacing the defec... Read More
Inventors: Yeh, Tsuei-Chi;, Assignee: |
Bidirectional line switch ring network
Therefore, in view of the above-mentioned problems, the present invention has as its object the simplification of the hardware configuration and control for handling the loopback switching and the red... Read More
Inventors: Yamamoto, Chiyoko; Maruhashi, Daisuke; Shioda, Masahiro;, Assignee: Fujitsu Limited (Kanagawa, JP) |
Virtual multi-port RAM
It is therefore an object of the present invention to provide a multi-port RAM structure which combines a multi-port function with the speed and density that cannot be matched with either conventional... Read More
Inventors: Chappell, Barbara A.; Chappell, Terry I.; Ebcioglu, Mahmut K.; Schuster, Stanley E.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Decoding global drive/boot signals using local predecoders
One aspect of the invention comprises a decoding circuit for driving a word line associated with at least one row of memory cells in an integrated circuit array having a plurality of such word lines. ... Read More
Inventors: Kersh, III, David V.; Childers, Jimmie D.;, Assignee: Texas Instruments Incorporated (Dallas, TX) |
Apparatus and method for CRC computation over fixed length blocks containing variable length packets of data received out of order
Overview FIG. 1 depicts a Page CRC Generator 101 and a Page Buffer Memory 102 of the present invention in the context of a tape storage subsystem application. Host 106 transmits user supplied data ov... Read More
Inventors: Boyer, Keith G.; Burns, Kenneth R.; Gohl, Thomas H.; Gottehrer, Terry R.; Marasco, Bernie R.; Stephens, Michael R.; Thompson, Robert D.;, Assignee: Storage Technology Corporation (Louisville, CO) |
Semiconductor memory device having even and odd numbered bank memories
An object of this ivention is to provide a semiconductor memory device which can simultaneously access a plurality of bits of a word data defined by bit area boundaries, and increases the data-process... Read More
Inventors: Kai, Naoyuki;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Semiconductor memory device having split operation and capable of reducing power supply noise
An object of the present invention is to provide a semiconductor memory device that effectively overcomes the problem associated with the prior art technology that was described above; viz, increasing... Read More
Inventors: Ohtsuki, Yoshio;, Assignee: Oki Electric Industry Co., Ltd. (Tokyo, JP) |
Monolithically integrated semiconductor circuit
I claim: 1. Monolithically integrated digital semiconductor circuit, comprising an address decoder, first means connected to said address decoder for supplying external addressing signals thereto, a t... Read More
Inventors: Michael, Ewald;, Assignee: Siemens Aktiengesellschaft (Berlin and Munich, DE) |
Semiconductor device with component circuits under symmetric influence of undesirable turbulence
It is therefore an important object of the present invention to provide a semiconductor memory device the component elements of which is less liable to have influences of other component elements. It ... Read More
Inventors: Goto, Hiroyuki;, Assignee: NEC Corporation (Tokyo, JP) |
Memory output circuit
I claim: 1. In a semiconductor memory, an output circuit comprising: an output transistor series pair, each transistor of said pair being coupled to a respective bootstrapped driver circuit; driver me... Read More
Inventors: Monk, Trevor K.;, Assignee: Standard Telephones & Cables (London, GB2) |
High voltage switching circuit in a nonvolatile memory
Accordingly, an object of this invention is to provide a nonvolatile semiconductor memory device with a voltage select circuit which outputs a given write potential without any potential drop. To achi... Read More
Inventors: Tanaka, Sumio; Atsumi, Shigeru; Ohtsuka, Nobuaki; Imamiya, Keniti;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Semiconductor memory with segmented word lines
It is an object of the present invention to provide a semiconductor memory device, particularly an ECL-type S.RAM, which can reduce the current density of wiring, even for narrow-width wiring used in ... Read More
Inventors: Nakajima, Tetsuya; Nagahara, Masaki;, Assignee: Fujitsu Limited (Kawasaki, JP) |
Latch-up control for a CMOS memory with a pumped well
An object of the present invention is to provide an improved power-up circuit for a DRAM. Another object of the invention is to provide an improved latch-up protection circuit for a CMOS memory. Yet a... Read More
Inventors: Remington, Scott I.; Crisp, Richard D.;, Assignee: Motorola, Inc. (Schaumburg, IL) |
Monolithically integrated semiconductor store
An object of the invention is to further reduce the storage space required for a semiconductor store of the noted type. This is achieved in accordance with the invention by providing each storage elem... Read More
Inventors: Meusburger, Gunther;, Assignee: Siemens Aktiengesellschaft (Berlin & Munich, DE) |
Fault Detection 
