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Architecture for high speed class of service enabled linecard
| Details |
Inventors: Wilford, Bruce; Dan, Yie-Fong;
Assignee: Cisco Technology, Inc. (San Jose, CA)
Primary Examiner: Pham; Chi
Assistant Examiner: Boakye; Alexander O.
Attorney, Agent or Firm: Campbell Stephenson Ascolese LLP
A linecard architecture for high speed routing of data in a communications device. This architecture provides low latency routing based on packet priority: packet routing and processing occurs at line rate (wire speed) for most operations. A packet data stream is input to the inbound receiver, which uses a small packet FIFO to rapidly accumulate packet bytes. Once the header portion of the packet is received, the header alone is used to perform a high speed routing lookup and packet header modification. The queue manager then uses the class of service information in the packet header to enqueue the packet according to the required priority. Enqueued packets are buffered in a large memory space holding multiple packets prior to transmission across the device's switch fabric to the outbound linecard. On arrival at the outbound linecard, the packet is enqueued in the outbound transmitter portion of the linecard architecture. Another large, multi-packet memory structure, as employed in the inbound queue manager, provides buffering prior to transmission onto the network. |
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DETAILED DESCRIPTION Introduction The present invention is a linecard architecture that provides packet routing with very low latency.
Portions of the linecard operate at line rate, also referred to as "wire rate" in the art and denoting the speed at which bits actually transit the network's physical medium (e.
g.
, copper wires, fiber optic, etc.
) for maximum throughput.
In one embodiment of the present invention, the linecard architecture consists of three main sections: the network physical interface, the layer 3 packet switching system, and the fabric interface.
The network physical interface consists of both the physical connection to the network and the layer 1 and layer 2 protocol translation circuits.
For example, in one embodiment of the present invention, the linecard is connected to the network by an OC192 optical fiber interface.
Alternatively, multiple optical connections at lower rates (e.
g.
, 4.
times.
OC48) or other media (e.
g.
, copper) can be used.
Although a SONET network interface is described, those skilled in the art will realize that physical medium interfaces and transport layer protocols other than SONET, such as SDH, can be used.
Accordingly, the invention is not limited to any particular type of physical medium or transport layer protocol.
Referring to FIG.
1, packets entering the linecard from network 1 ("inbound packets") arrive on the physical medium at inbound interface 111.
The encapsulated layer 3 data is extracted from the received bitstream by circuitry well-known in the art.
In one embodiment, an OC192 optical-to-electrical converter is followed by a physical layer interface module (PLIM) that re-frames and channelizes the SONET data stream from the optical carrier.
Together, the OC192 optical interface and PLIM form inbound interface 111.
The output of the PLIM is a stream of inbound packets 113 which are then presented to the layer 3 (L3) switching system that forms control element 130 of linecard 110.
FIG.
2 shows a high level schematic of a linecard architecture according to one embodiment of the present invention
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