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Network switch with a multiple bus structure and a bridge interface for transferring network data between different buses
A network switch according to the present invention includes a plurality of first network ports, a plurality of second network ports, a first bus coupled to the first ...
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Method, system, and program for managing requests to a cache using flags to queue and dequeue data in a buffer
OF THE PREFERRED EMBODIMENTS In the following description, reference is made to the accompanying drawings which form a part hereof and which illustrate several ...
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High-speed data bus for network switching
The specification will be organized as follows: 1. BlazePath.TM./BlazeFire.TM. Architecture/Chip Set 2. Header "Canonicalization" and Packet "Cellularization" 3. BlazeW...
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Method and apparatus for data buffer management in a communications switch
OF A PREFERRED EMBODIMENT OF THE INVENTION Generally, the present invention provides a method and apparatus for buffering data cells in a queuing element included in ...
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Handling contiguous memory references in a multi-queue system
What is claimed is: 1. A controller for a random access memory comprises: control logic, including an arbiter that detects a status of outstanding memory references to ...
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Communication between processors
Referring to FIG. 1, a computer system 26 includes two processors 1, 2. Each processor 1, 2 has a corresponding static random access memory (SRAM) 21, 22 for storing ...
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Optimizations to receive packet status from fifo bus
According to one aspect of the invention, a method is described of receiving bytes of data from a media device includes issuing N consecutive requests, each for M bytes, ...
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Storing frame modification information in a bank in memory
The present invention comprises a method and system for reserving frame modification information in a data storage unit. In one embodiment, a system comprises a ...
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Scratchpad memory
According to one aspect, a integrated circuit includes a random-access memory (RAM) storage and a controller both located on the same semiconductor chip. The controller ...
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Read lock miss control and queue management
According to one aspect of the invention, a method is described of managing memory access to random access memory includes fetching a read lock memory reference request ...
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