Distributed data dependency stall mechanism

DETAILED DESCRIPTION The invention resides in allowing each probe queue in a multiprocessor computer system to be individually stalled when a probe message, that targets data not yet stored in an associated cache or victim data buffer, reaches the top of that queue.
Such an arrangement improves the performance of the computer system by allowing all regions of memory and all probe queues that are not associated with the stall condition, to remain in operation.
More specifically, a multiprocessor computer system utilizing the present invention operates as follows.
When a first CPU in the computer system requires an element of a data block not stored in its cache, it issues a readmiss command to the system control logic to retrieve a specified data block.
When the command wins arbitration in the system control logic, the entries of the duplicate tag store are compared with the address of the data block to determine if another CPU has a most up-to-date copy stored in its cache.
Because the duplicate tag store entries are updated when each command wins arbitration rather than when the command is actually completed, it is possible for the duplicate tag store to indicate that a CPU has a most up-to-date copy of a data element that is still in the process of being retrieved.
Therefore, the duplicate tag store could indicate that the cache of a second CPU has a most up-to-date copy of the specified data when, in fact, it is still in the process of retrieving that data.
The system control logic will responsively place a probe read message on the second CPU's probe queue.
If the data has not been retrieved by the second CPU before the probe message reaches that top of the probe queue, that queue will be stalled.
The rest of the computer system will continue to operate as if that queue were not stalled, and therefore the performance of the other CPUs is not hampered.