Dual-array register file with overlapping window registers

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The following description will successively discuss the respective register files according to five embodiments of the present invention with reference to the attached drawings.
[First Embodiment] Referring to FIG.
1, 64 registers forming a register file are divided into eight windows W0 to W7 each containing 16 registers R0 to R15.
For example, "W0.
sub.
-- R2" refers to a register 2 in a window 0.
Each window shares eight registers R0 to R7 with the adjacent window having a window No.
smaller by 1 than the window No.
of said each window, and each window shares the remaining eight registers R8 to R15 with the adjacent window having a window No.
greater by 1 than the window No.
of said each window.
For example, "W0.
sub.
-- R0" and "W7.
sub.
-- R8" refer to the same register.
The windows do not have non-overlapping portions, and all the registers are double-address registers.
In FIG.
2, 64 registers each having a 32-bit length are divided into first and second memory cell arrays 15, 16.
The first memory cell array 15 has 32 registers 151 (such as W0.
sub.
-- R0, W7.
sub.
-- R8 and the like) to be designated by even-numbered register addresses.
Each of the 32 registers 151 in the first memory cell array 15 has two first read word lines RWL1, and these 32 registers 151 share 32 first read bit lines RBL1 with one another.
The second memory cell array 16 has 32 registers 161 (such as W0.
sub.
-- R1, W7.
sub.
-- R9 and the like) to be designated by odd-numbered register addresses.
Each of the 32 registers 161 in the second memory cell array 16 has two second read word lines RWL2, and these 32 registers 161 share, with one another, 32 second read bit lines RBL2 which are different from the first read bit lines RBL1.
A register address signal generating circuit 11 is adapted to receive an instruction signal, from which a register address (0 to 15) is taken out to generate a 4-bit register address signal RN3 to RN0.
A window control circuit 12 is disposed for supplying a 3-bit window No