Interface for coupling a floating point unit to a reorder buffer

DETAILED DESCRIPTION The problems outlined above are in large part solved by an interface between a reorder buffer and a floating point unit in accordance with the present invention.
The interface comprises at least a retire signal provided by the reorder buffer and a valid signal provided by the floating point unit.
When the reorder buffer detects a particular floating point instruction which is ready to be retired (via retirement or execution of the instructions prior to the particular floating point instruction), the reorder buffer pulses the retire signal.
When the floating point unit executes the particular floating point instruction and produces a corresponding instruction result, the floating point unit pulses the valid signal.
Upon assertion of both the retire signal and the valid signal, the particular floating point instruction is retired by the floating point unit.
On the other hand, the reorder buffer discards the particular floating point instruction upon asserting the retire signal, thereby allowing subsequent integer instructions to be retired.
If a second floating point instruction is encountered by the reorder buffer prior to receiving an asserted valid signal corresponding to the particular floating point instruction, the reorder buffer does not assert the retire signal in response to the floating point instruction if exceptions are enabled.
Either the valid signal or the retire signal may be asserted first (in a temporal sense) for the particular floating point instruction.
The receiving unit for the signal asserted first stores the signal in a shift register until the receiving unit detects the particular floating point instruction.
The received signal pulse is then associated with the particular floating point instruction.
Advantageously, either the floating point unit or the reorder buffer may get "ahead" with respect to floating point instructions, indicating the ability to retire multiple floating point instructions.
For example, the floating point unit may queue multiple instruction results in a result buffer and may pulse the valid signal for each of the corresponding floating point instructions