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Multiprocessor computer system
| Details |
Inventors: Neches, Philip M.; McMillen, Robert J.; Watson, M. Cameron; Chura, David J.;
Assignee: NCR Corporation (Dayton, OH)
Primary Examiner: Harrell; Robert B.
Assistant Examiner:
Attorney, Agent or Firm: Merchant, Gould, Smith, Edell, Welter & Schmidt
A multistage interconnect network (MIN) capable of supporting massive parallel processing, including point-to-point and multicast communications between processor modules (PMs) which are connected to the input and output ports of the network. The network is built using interconnected switch nodes arranged in 2 log.sub.b N stages, wherein b is the number of switch node input/output ports, N is the number of network input/output ports and log.sub.b N indicates a ceiling function providing the smallest integer not less than log.sub.b N. The additional stages provide additional paths between network input ports and network output ports, thereby enhancing fault tolerance and lessening contention. |
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DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 1.
GENERAL DESCRIPTION 2.
NETWORK TOPOLOGY 3.
SWITCH NODES 4.
NETWORK CONTROLLERS 5.
DIAGNOSTIC PROCESSORS 6.
PACKAGING 7.
TYPE-A BOARD 8.
TYPE-B BOARD 9.
TYPE-C BOARD 10.
COMMUNICATION MODULE ASSEMBLY 11.
SIMPLIFIED CABLING 12.
SWITCH NODE ADDRESSING 13.
AUTOMATIC PROCESSOR ID ASSIGNMENT 14.
DYNAMIC CONFIGURATION 15.
SIMPLIFIED BACKPLANE ROUTING 16.
CONNECTION PROTOCOL 17.
DISCONNECTION PROTOCOL 18.
MONOCAST LOAD BALANCING 19.
MONOCAST NON-BLOCKING 20.
MONOCAST BLOCKING 21.
MONOCAST BLOCKING WITHOUT LOAD BALANCING 22.
MONOCAST PIPELINE 23.
MONOCAST NON-PIPELINE 24.
CONTROLLER SOFTWARE 25.
SUPERCLUSTERS 26.
MULTICAST 27.
FORWARD CHANNEL COMMANDS 28.
BACK CHANNEL REPLIES 29.
NETWORK APPLICATIONS 30.
CONCLUSION TABLE I TABLE II TABLE III TABLE IV TABLE V CLAIMS BACKGROUND OF THE INVENTION 2.
Field of the Invention This invention relates in general to computer networks, and in particular to a scalable multi-stage interconnect network 14 for multiprocessor computers.
3.
Description of Related Art Parallel processing is considered an advantageous approach for increasing processing speeds in computer systems.
Parallel processing can provide powerful communications and computer systems which can handle complex problems and manipulate large databases quickly and reliably.
One example of parallel processing can be found in U.
S.
Pat.
No.
4,412,285, issued Oct.
25, 1983, to Neches et al.
, incorporated by reference herein.
This patent describes a system using a sorting network to intercouple multiple processors so as to distribute priority messages to all processors.
Further examples of parallel processing can be found in U.
S.
Pat.
No.
4,445,171, issued Apr.
24, 1984, to Neches, U.
S.
Pat.
No.
4,543,630, issued Sep.
24, 1985, to Neches, and U.
S.
Pat.
No.
4,814,979, issued Mar.
21, 1989, to Neches, all of which are incorporated by reference herein.
These patents describe a multiprocessor system which intercouples processors with an active logic network having a plurality of priority determining nodes
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