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Reconfigurable computing architecture for providing pipelined data paths
| Details |
Inventors: Ebeling, William Henry Carl; Cronquist, Darren Charles; Franklin, Paul David;
Assignee: University of Washington (Seattle, WA)
Primary Examiner: Sheikh; Ayaz R.
Assistant Examiner: Phan; Raymond N
Attorney, Agent or Firm: Christensen O'Connor Johnson & Kindness PLLC
A configurable computing architecture (10) has its functionality controlled by a combination of static and dynamic control, wherein the configuration is referred to as static control and instructions are referred to as dynamic control. A reconfigurable data path (12) has a plurality of elements including functional units (32, 36), registers (30), and memories (34) whose interconnection and functionality is determined by a combination of static and dynamic control. These elements are connected together, using the static configuration, into a pipelined data path that performs a computation of interest. The dynamic control signals (21) are suitably used to change the operation of a functional unit and the routing of signals between functional units. The static control signals (23) are provided each by a static memory cell (62) that is written by a host (13). The controller (14) generates control instructions (16) that are interpreted by a control path (18) that computes the dynamic control signals. The control path is configured statically for a given application to perform the appropriate interpretation of the instructions generated by the controller. By using a combination of static and dynamic control information, the amount of dynamic control used to achieve flexible operation is significantly reduced. |
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DETAILED DESCRIPTION The present invention is a reconfigurable data path whose functionality is controlled by a combination of static and dynamic control, wherein the configuration is referred to as static control, and instructions are referred to as dynamic control.
The present invention is a configurable computing architecture that has a plurality of elements, including functional units, registers, and memories, whose interconnection and functionality are determined by a combination of static and dynamic control.
These elements are connected together, using the static configuration, into a pipelined data path that performs a computation of interest.
The dynamic control signals are suitably used to change the operation of a functional unit and the routing of signals between functional units.
The static control signals are provided each by a static memory cell that is written by a controller, or host.
The controller generates control instructions that are interpreted by a control path that computes the dynamic control signals.
The control path is configured statically for a given application to perform the appropriate interpretation of the instructions generated by the controller.
By using a combination of static and dynamic control information, the amount of dynamic control used to achieve flexible operation is significantly reduced.
According to an aspect of the present invention, a reconfigurable computing architecture executes a plurality of applications, and each application is executed over a plurality of execution cycles.
The architecture includes means for generating a set of first signals having a state that remains unchanged over the execution cycles of any one of the applications, means for generating a set of second signals having states that are changeable over the execution cycles, and means for inputting and outputting data.
A linear array of interconnectable functional units is provided, and each functional unit is arranged to perform a plurality of functions on the data
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