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 Validating multiple execution plans for database queries

Details
Inventors: Galindo-Legaria, Cesar A.; Waas, Florian;
Assignee: Microsoft Corporation (Redmond, WA)
Primary Examiner: Robinson; Greta
Assistant Examiner: Veillard; Jacques
Attorney, Agent or Firm: Woodcock Washburn LLP

Validation of large numbers of alternative execution plans for a database query, either an exhaustive enumeration of the complete space of alternatives, or else an unbiased random sample, is performed by efficiently constructing execution trees from a data structure having groups alternative operators that are ranked in a directory. Each global rank of a plan identifies that plan uniquely among all the alternative plans. The operators are unranked from the directory according to a specification that characterizes the desired plans.

DETAILED DESCRIPTION This description and the accompanying drawing illustrate specific examples of embodiments in which the present invention can be practiced, in sufficient detail to allow those skilled in the art to understand and practice the invention.
Other embodiments, including logical, electrical, and mechanical variations, are within the skill of the art.
Skilled artisans will also recognize features and advantages of the invention other than those explicitly set forth.
The scope of the invention is to be defined only by the appended claims, and not by the specific embodiments described below.
FIG.
1 is a high-level diagram of an illustrative environment 100 having software 110 and hardware 120 for hosting the invention as executable instructions, data, and/or electronic and mechanical components.
Other suitable environments, and variations of the described environment are also possible.
Hardware components 120 are shown as a conventional personal computer (PC) including a number of components coupled together by one or more system buses 121 for carrying instructions, data, and control signals.
These buses may assume a number of forms, such as the conventional ISA, PCI, and AGP buses.
Some or all of the units coupled to a bus can act as a bus master for initiating transfers to other units.
Processing unit 130 may have one or more microprocessors 131 driven by system clock 132 and coupled to one or more buses 121 by controllers 133.
Internal memory system 140 supplies instructions and data to processing unit 130.
High-speed RAM 141 stores any or all of the elements of software 110.
ROM 142 commonly stores basic input/output system (BIOS) software for starting PC 120 and for controlling low-level operations among its components.
Bulk storage subsystem 150 stores one or more elements of software 110.
Hard disk drive 151 stores software 110 in a nonvolatile form.
Drives 152 read and write software on removable media such as magnetic diskette 153 and optical disc 154.
Other technologies for bulk storage are also known in the art



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