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| Thermal ink jet composition |
| OF PREFERRED EMBODIMENTS Inks of the present invention comprise a dye colorant. Generally, any ... |
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| Ink composition for ink jet recording |
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| Ink compositions for thermal ink jet printing |
| OF THE INVENTION Inks of the present invention contain an aqueous liquid vehicle, a colorant, 1,4-... |
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| High temperature concrete composites containing organosiloxane crosslinked copolymers |
| What is claimed is: 1. A thermally stable polymer concrete composition comprising about 10-30% by ... |
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| Phosphomagnesia cements having reduced sensitivity to water |
| OF BEST MODE AND PREFERRED EMBODIMENTS OF THE INVENTION More particularly according to the present ... |
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| Water-repellent wallboard |
| OF THE PRESENT INVENTION The water-repellent compositions of the present invention for preparing ... |
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| Irradiation detection and identification method and compositions useful therein |
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| Method for improving fluorescent coatings |
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Verification of port list integrity in a hardware description language file
| Details |
Inventors: Brown, Jeffrey R.;
Assignee: Micron Technology, Inc. (Boise, ID)
Primary Examiner: Homere; Jean R.
Assistant Examiner:
Attorney, Agent or Firm: Knobbe, Martens, Olson & Bear, LLP
A method and computer readable medium are provided for analyzing the integrity of a port list for a component and instantiated modules in a hardware description language file. An example of a hardware description language to which the method and the computer readable medium can be applied is VHDL. The method compares the port lists for a component and associated modules. In the event the component port list and module port list differ, an advisory can be generated to indicated a potential error. The advisory can identify the deviation, and note its location within the hardware description language file. In this manner, the designer can quickly find the port list errors and correct them prior to simulation. Such a port list verification method can significantly reduce the time and effort involved in port list debugging. Consequently, the designer can devote more time and resources to the design effort and the end objective of producing the subject design. In many cases, reduction of debugging costs will bear significantly on the final cost of the design. At the same time, reduction of debugging time can shorten the design cycle. |
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DETAILED DESCRIPTION FIG.
1 is a functional block diagram of a system 10 implementing a method for analyzing the integrity of a port list in a hardware description language file in accordance with an embodiment of the present invention.
As shown in FIG.
1, system 10 may include a processor 12, memory 14, an input device 16, and an output device 18.
Memory 14 may include random access memory (RAM) storing program code that is accessed and executed by processor 12.
The program code can be loaded into memory 14 from another memory device, such as a fixed hard drive or removable media device associated with system 10.
Processor 12 may take the form of any conventional general purpose single- or multi-chip microprocessor such as a Pentium.
RTM.
processor, a Pentium Pro.
RTM.
processor, an 8051 processor, a MIPS processor, a Power PC.
RTM.
processor, or an Alpha.
RTM.
processor.
In addition, processor 12 may be any conventional special purpose microprocessor.
Input device 16 may include a conventional keyboard and pointing device such as a mouse or trackball, if desired.
Output device 18 may include a computer monitor, such as a CRT or flat panel display, that provides textual and/or graphic output to the user.
Further, processor 12, memory 14, input device 16, and output device 18 may be integrated with or form part of a personal computer or computer workstation.
The program code stored in memory 14 can be arranged such that, when executed, processor 12 analyzes the integrity of a port list in a hardware description language file.
In particular, processor 12 analyzes a port list for a component instance, or "module.
" The hardware description language file includes component declarations, such as VHDL component declarations.
Each component declaration includes a component port list that defines an external interface to the component.
The hardware description language file also may include a data flow description for each component.
The data flow description describes the internal functionality of the component
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File Sharing 
