Digital video display having analog interface with clock and video signals synchronized to reduce image flicker

DETAILED DESCRIPTION The object of the present invention is to provide an analog video interface for a digital display device, which is compatible with a desired widely-used analog display adapter and the cable connection thereof while enabling a flicker-free image of high quality on the digital display panel.
This is achieved by means of an analog video interface for a digital video display of the type described in the introduction, which according to the invention is characterized in that said display further comprises means for determining the actual video frequency of the analog video signal on the basis of said received signals; said means for generating the basic clock signal comprising a programmable frequency synthesizer means responsive to said determining means for synthesizing the basic clock of a frequency which is at least n times said determined actual video frequency, where n.
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1.
In the invention, a synthesized clock signal is utilized in place of the fixed clock signal and sampling clock of the digital display panel so that the frequency of the synthesized clock signal is adjusted in accordance with the actual video frequency of the video signal received.
To determine the actual video frequency of the received video signal with sufficient accuracy, the video interface according to the invention calculates the video frequency on the basis of the duration of the received horizontal or vertical deflection period and the video clock periods (pixels) in the deflection period for each specific display resolution.
Preferably, a basic clock having a frequency which is a multiple of the actual video frequency is synthesized on the basis of the calculated actual video frequency, and the sampling clock and all the control signals of the digital display are derived from the basic clock frequency.
A quadruple basic clock frequency (n=4) is particularly advantageous as the Inventor has discovered that, to obtain a stable interference-free image (without flickering of pixels) on the screen, the sampling clock period must not deviate from the video clock period of the received analog video signal by more than 1/4 of the video clock period