 Chandeliers |
| Among the several objects of this invention may be noted the provision of improved collapsible ... |
|
| Dc-to-Dc converters using multi-resonant switches |
| The present invention relates to the use of a novel multi-resonant switch concept to generate ... |
|
| AC/DC converter using resonant network for high input power factor |
| In FIG. 1 there is shown an AC to DC converter comprising: (a) an input transformer, generally ... |
|
| Single ended, separately driven, resonant DC-DC converter |
| Accordingly, an object of the present invention is to provide a DC-DC converter which ensures a ... |
|
| Voltage multiplier circuit with reduced back-gate bias effect |
| It is an object of the invention to provide a voltage multiplier circuit incorporating a more ... |
|
| Internal reforming type fuel cell |
| What is claimed is: 1. An internal reforming type fuel cell comprising: a first reforming region ... |
|
| Method and apparatus for controlling the temperature of a reforming reaction catalyst |
| An object of the present invention is to provide a control method and a control apparatus wherein ... |
|
| Clad structural member with NbTiAl low Hf alloy cladding and niobium base metal core |
| OF THE INVENTION Pursuant to the present invention, clad composite structures are formed ... |
|
| Solid oxide fuel cell matrix and modules |
| Accordingly, it is an object of the present invention to provide a building block structure for a ... |
|
|
Method and apparatus for testing an integrated circuit
| Details |
Inventors: Delvigne, Josephus;
Assignee: U.S. Philips Corporation (New York, NY)
Primary Examiner: Strecker; Gerard R.
Assistant Examiner: Snow; Walter E.
Attorney, Agent or Firm: Miller; Paul R.
In order to set the circuit to be tested to a test mode, at least one output is led out by an output stage, and the input and output of the output stage internally leads to an exclusive-OR gate. As long as the output has a comparatively high-ohmic termination, as is the case during the normal mode of operation, the exclusive-OR gate will carry the same signal for both signal conditions of the output. For the purpose of testing a complementary pulse pattern is applied to the output, so that the exclusive-OR gate supplies an opposite signal, which establishes the test mode. The output of the exclusive-OR gate may lead to a bistable multivibrator, so that for establishing the test mode only a single complementary signal is required. |
|
DETAILED DESCRIPTION What is claimed is: 1.
A method of testing an integrated circuit which generates at least one digital output signal comprising the steps of: connecting an integrated circuit device of said integrated circuit to a first stage of an output circuit, connecting said first stage of said output circuit to a logic circuit and to an output stage of said output circuit, said logic circuit evaluating a combination of signal conditions and said logic circuit controlling a test mode, connecting said logic circuit to a test control circuit, said test control circuit causing said integrated circuit device to be switched to said test mode upon application of a signal pattern, and applying said signal pattern to said output stage to set said test mode, said signal pattern being complementary to a time signal pattern to be generated.
2.
An arrangement for carrying out a method of testing an integrated circuit which generates at least one digital output signal comprising: first means for connecting an integrated circuit device of said integrated circuit to a first stage of an output circuit, second means for connecting said first stage of said output circuit to a logic circuit and to an output stage of said output circuit, said logic circuit evaluating a combination of signal conditions and said logic circuit controlling a test mode, third means for connecting said logic circuit to a test control circuit, said test control circuit switching said integrated circuit device to said test mode upon application of a signal pattern, and fourth means for applying said signal pattern to said output stage to set said test mode, said signal pattern being complementary to a time signal pattern to be generated, wherein said logic circuit is an exclusive OR-gate having an output connected to a control input of said test control circuit.
3.
An arrangement according to claim 2, wherein said output circuit is a non-inverting circuit stage, and said test control circuit is set to said test mode by a logic 0 on said control input by said logic circuit
|
| Related patents |
|
|
Method and apparatus for balancing the magnetic field detecting loops of a cryogenic gradiometer using trimming coils and superconducting disks
In the present invention a gradiometer is balanced by inserting a trimming element, which is comprised of two relatively small balancing loops of opposite, flux ...
|
|
|
Digital frequency measuring circuitry
With the foregoing in mind, it is an object of the present invention to provide an improved digital frequency measuring circuit which alleviates the aforementioned poor ...
|
|
|
Electrical storage cell resistant to freezing
The present invention provides a modified electrical storage cell construction for nickel-hydrogen and similar types of cells. The invention permits the use of the ...
|
|
|
Method and device for feeding a fuel cell with a fluid reactant
I claim: 1. A method of feeding a fuel cell with at least one fluid reactant, comprising circulating at least one fluid reactant through a closed loop including a fuel ...
|
|
|
Electronic component using a silicon carbide substrate and a method of making it
What is claimed is: 1. An electronic device comprising: a sintered substrate consisting essentially of silicon carbide; an intermediate layer consisting essentially of a ...
|
|
|
Switching power supply
Accordingly, the present invention is intended to provide a switching power supply having a very low number of components, short response time, very high reliability and ...
|
|
|
Switching power amplifier
Accordingly, the present invention is intended to provide a switching power amplifier having a very low number of components, short response time, very high reliability ...
|
|
|
High efficiency power amplifier comprising multilevel power supply
OF THE INVENTION FIG. 1 is the embodiment of the high efficiency PA as disclosed in the aforementioned U.S. Pat. No. 4,782,306 by the same inventor. The PA comprises 4-...
|
|
|
High power switching power supply
The present invention is intended to provide an SPS having a high output power and high efficiency. This is accomplished by successively applying voltages of opposite ...
|
|
|
PWM controlled DC/AC power converter
Therefore, an object of this invention is to provide an apparatus for controlling a power converter interposed between the d.c. power source and the a.c. system to ...
|
|
|
Fuel Cells 
