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 Method of manufacturing semiconductor package

Details
Inventors: Kim, Gu S.; Kim, Young S.;
Assignee: Samsung Electronics Co., Ltd. (Suweon, KR)
Primary Examiner: Arbes; Carl J.
Assistant Examiner:
Attorney, Agent or Firm: Ladas & Parry

The present invention relates to a semiconductor package which is loaded with a plurality of high-performance integrated circuits for high-performance systems such as super computers and large-sized computers. According to the invention, the packaging density of the semiconductor is doubled by stacking upper and lower members and forming substrates loaded with a plurality of chips in a multistep structure so that the size of computers can be minimized and heat emission efficiency can be improved by forming heat sinks in a fin-pin shape.

DETAILED DESCRIPTION The present invention has been made in consideration of this and has it for object to provide a semiconductor device which improves the packaging density by forming a plurality of wiring substrates provided with the chips in a multistep structure so as to minimize the size of the products such as the large-sized computers.
Another object of the invention is to provide a method of manufacturing a multichip-module of semiconductor package by loading the wiring substrates in the multistep structure and connecting them electrically.
According to the invention, there is provided a semiconductor package comprising; upper and lower members which are formed in a stacked-structure, coupled with pads at the center of each member, substrates attached to said upper and lower members, on which a plurality of high integration chips are loaded and circuit patterns are wire-bonded with the surface thereof, connection means for connecting electrically the chips on said substrates, external leads connected to the connection means, and a heat sink formed at outside surfaces of said upper and lower members.
Also, according to the present invention, there is provided a method of manufacturing a semiconductor package, comprising the following steps: preparing upper and lower members at the center of which pad is inserted, attaching substrates provided with a plurality of chips to insides of upper and lower members, interconnecting electrically said chips attached to said substrates in each of said upper and lower members, connecting electrically the upper member to the lower member through connecting pads and simultaneously sealing the upper and lower members, and forming a heat sink for emitting internal heat to the outside.



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