Monitoring circuit

DETAILED DESCRIPTION FIG.
1 is a simplified functional block diagram of the monitoring circuit which is the subject of this invention.
The monitoring circuit may either be operated in the self-scan or the one-to-one correspondence modes.
In either case the circuit being monitored generates a series of bit patterns which are coupled to the monitoring circuit as inputs.
Each of the patterns is indicative of the operational status or the circuit being monitored at the time the pattern is generated.
In the self-scan mode a selected number of patterns are compared to one or more digital data words which are stored in a memory.
Normal operation is inferred from a one-to-one bit correspondence between each of the selected bit patterns, generated by the device being monitored, and at least one of the bit patterns stored in the memory resulting in the total number of correspondence cases per cycle being equal to the number or selected bit patterns.
In the one-to-one correspondence mode, each of the selected bit patterns generated by the device being monitored is compared to a selected bit pattern stored in the memory.
Normal operation is inferred by a one-to-one correspondence of these values.
In either mode, the highest number of selected bit patterns is determined by the capacity of the memory.
The system may also include analog signal and frequency monitoring circuits although these features are not illustrated in FIG.
1 and not required by many applications.
In the self-scan mode the monitoring circuit illustrated in FIG.
1 receives a cycle timing signal from the circuit being monitored.
Each pulse of this signal defines the beginning of a cycle of the circuit being monitored.
A pulsed trigger signal to initiate the comparison of each of the selected bit patterns generated by the device being monitored to the stored bit patterns is also generated by the device being monitored.
Between adjacent pulses of the trigger signal, the monitoring circuit compares the multibit pattern coupled to the monitoring circuit to each of the multibit patterns stored in the digital memory