Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home Graphic Cards Static-dataflow-computer-with-a-plurality-of-control-structures-simultaneously-and-continuously-monitoring-first-and-second-communication-channels

 Mechanical protractor
An object of the present invention is to provide a new and improved device for measuring the angle ...


 Apparatus for displaying characters
Accordingly, an object of the invention is to provide a display system with a single character ...


 Adaptive environment control system
The adaptive environment control system of the present invention is illustrated in block diagram ...


 System for numerically controlling a machine tool
It is the main object of the invention to realize a numerical control of a machine tool of the ...


 Wear particle disintegrator monitor
The subject invention is intended to enhance the utility of ferrous debris detectors used in ...


 Complex analog waveform generator
In FIG. 1, a signal generator 10 is connected via a transmission channel 21 to a signal receiver 22...


 Second difference function generator
The above objections of the prior art as well as others may be overcome by providing the ...


 Display advance system for a word processor
The present invention provides a display advance system for a word processor having a video screen ...


 Table tennis bat blade
The present invention relates to a new table tennis bat blade which, in basic form, is composed of ...


 Systems for supplying unmodulated baseband signals to television receivers
OF THE INVENTION INCLUDING THE PREFERRED EMBODIMENT Referring to the drawing, a conventional ...


 Static dataflow computer with a plurality of control structures simultaneously and continuously monitoring first and second communication channels

Details
Inventors: Sterling, Thomas L.; Chan, Ellery Y.;
Assignee: Harris Corporation (Melbourne, FL)
Primary Examiner: Lee; Thomas C.
Assistant Examiner:
Attorney, Agent or Firm: Evenson, Wands, Edwards, Lenahan & McKeown

An associative architecture for a static data flow processing system comprises a functional computation unit in which data processing operations are executed, a data processing execution control structure (template) storage and control unit and communication channels through which the functional computation unit and the template storage and control unit communicate with one another. The template storage and control unit controls the supply of data to be processed by the functional computation unit and includes memory for storing a plurality of templates. Each template storage and control unit assembles data processing messages for application to a first of the communication channels for controlling the execution of a data processing operation by the functional computation unit. Each message contains the address of that template to which the result of the data processing operation is returned and stored in a return buffer, an opcode and either the data directly or the address of the template that contains the data to be processed by the functional computation unit. Each template also stores the status of a data processing execution cycle. Each template continuously monitors the communications channels for its address and, upon detecting its address, controllably interfaces prescribed information associated with the execution of a data processing operation with respect to the communication channels.

DETAILED DESCRIPTION Before describing in detail the particular improved computer architecture in accordance with the present invention, it should be observed that the present invention resides primarily in a novel structural combination of conventional signal processing and communication circuits and components and not in the particular detailed configurations thereof.
Accordingly, the structure, control and arrangement of these conventional circuits and components have been illustrated in the drawings by readily understandable block diagrams which show only those specific details that are pertinent to the present invention, so as not to obscure the disclosure with structural details which will be readily apparent to those skilled in the art having the benefit of the description herein.
Thus, the block diagram illustrations of the Figures do not necessarily represent the mechanical structural arrangement of the exemplary system, but are primarily intended to illustrate the major structural components of the system in a convenient functional grouping, whereby the present invention may be more readily understood.
Referring now to FIG.
1, the general architecture of a single node associative template dataflow processing system in accordance with the present invention is shown as comprising a pair of operational (storage/control and execution) units 11 and 13 linked with one another by way of a pair of communication paths 15 and 17.
By single node architecture is meant that all data processing operations with the system are executed within the confines of a self-contained node or processing unit, as contrasted with a multi-node environment, to be described infra, where multiple execution units have their own computational capabilities and share data resources through an inter-node communications architecture.
Within the single node system of FIG.
1, a data storage and control unit 11 and a functional computation unit 13 are mutually linked by way of an operation channel 15 and a result channel 17



Related patents
  Method and apparatus for trimming B-spline descriptions of patches in a high performance three dimensional graphics system
A typical high performance three dimensional graphics system will describe a surface to be rendered as surface patches defined by functions for each patch. Such ...
  System and method for generating a trimmed parametric surface for display on a graphic display device
What is claimed is: 1. A computer implemented method for generating for display a trimmed parametric surface as a single quadrilateral mesh in a computer graphics system,...
  Vertex and spherical normalization circuit
A normalization circuit suitable for use in a graphics adapter is disclosed. The circuit is configured to receive vertex data and includes a set of multiplexer circuits, ...
  Method and apparatus for displaying one or more measurement values of arbitrary measurement variables on a screen
I claim: 1. A method for displaying one or more measurement values of arbitrary measurement variables on the screen of a video display terminal (VDT) operating by the ...
  Electrolytic apparatus having a stable reference electrode and method of operating such apparatus
Before describing the detailed arrangement and control of reference electrodes in an electrochromic display according to the invention, a basic method for writing and ...
  Image processing apparatus, image output device, image processing method and record medium on which image processing program is recorded
The present invention is made to solve the above problem and the object is to reduce processing time without requiring a bulk memory by executing smoothing processing if ...
  Color image processing apparatus and method and color image output apparatus each using a color matching/processing method based on the color imput
An object of the present invention is to solve all or some of the drawbacks mentioned above. Another object of the present invention is to provide a color image ...
  Color image formation method and color image formation apparatus
It is therefore an object of the invention to provide a color image formation method and a color image formation apparatus for executing appropriate color gamut ...
  Liquid flow detecting device
What is claimed is: 1. A liquid flow detecting device incorporating a static member arranged to be fixed within a passage through which flow of an operating liquid is to ...
  Phototypesetting system and method
Briefly, the present invention is directed to a method and system for use in phototypesetting. According to one aspect of the invention, a type font is scanned and ...

0.034

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved