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| FIG. 1 is a block diagram of a data processing apparatus according to the present invention. It is ... |
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| OF THE DRAWINGS FIG. 1 is a schematic block diagram of a dual port memory according to a prior art;... |
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| Semiconductor memory device capable of relieving defective bits |
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| Protection circuit for non-volatile memory |
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| Disk cache control unit |
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| Internally cached static random access memory architecture |
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| Radio communication receiving device detecting a frequency modulation preamble signal |
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| Memory access address comparison |
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| Color television picture display device having a flicker reduction circuit |
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| Line camera for imaging object strips on photosensitive detector lines |
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Apparatus for vitally sensing binary data for a vital processor implemented with non-vital hardware
| Details |
Inventors: Rutherford, Jr., David B.;
Assignee: Sasib S.p.A. (Bologna, IT)
Primary Examiner: Chan; Eddie P.
Assistant Examiner:
Attorney, Agent or Firm: Pollock, Vande Sande & Priddy
The invention describes a method and apparatus for effecting vital functions notwithstanding the fact that non-vital hardware is employed. A vital processor is implemented using non-vital hardware in the form of a digital computer which may for example be a microprocessor. The vital processor accepts binary input values and, based on a series of logical expressions relating output values to input values, determines the appropriate output values. Rather than employing a single bit to represent the condition of a particular input or output, unique multibit binary values or names are used. Each input or output has assigned to it at least two unique multibit values, each satisfying the code rules of a different code. Thus rather than representing a closed contact as a single 1 bit, and an open contact as a single 0 bit, in accordance with the invention the closed contact is represented by a unique multibit name which satisfies the code rules of a first code. At any point in the processing the value representing the contact can be checked to see if it satisfies the code rules, and if it does not a potential error is detected and handled. Before actually controlling output devices in accordance with the processing, further tests are implemented which ensure that the multibit value computed for a particular output not only satifies the predetermined code rule which is required, but is also correct bit for bit. Logic equations describing the relationship between output and input are actually computed using the multibit values as opposed to single bit values. |
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DETAILED DESCRIPTION The invention provides a new solution for problems previously solved in the past, as well as providing solutions to those problems which have apparently been insoluble, all with a view toward providing vital characteristics in an admittedly non-vital digital processor.
The present invention is intended for application in an environment including five different elements Two elements are input and output devices 1 and 2.
The input devices 1 are arranged to provide appropriate input signals for processing, the input signals corresponding to that information which is necessary in order to produce the desired output information.
The output devices 2 have two functions, firstly they translate the signals representing output information as provided by a primary processor 3 into appropriate format to actually control the physical devices.
The output devices 2 are arranged so that they are conditionally controllable in response to output information from the primary processor 3 in such a fashion that they do not actually control real world devices, but in their conditionally controlled condition, can be checked to provide additional input information to the primary processor 3, this additional input information consists of sensing the actual condition of the output devices.
The information is used by the primary processor 3 to derive check words which, by their content, allow a comparison to be effected between the conditionally controlled condition of the output devices 2 and the information produced by the primary processor corresponding to the desired condition.
A third element of the invention is a primary processor 3, this can be a conventional microprocessor which is provided with the software described hereinafter.
The primary processor 3 has at least two different types of inputs, and two different types of outputs.
One necessary input is provided by sensing the condition of the input devices 1.
One type of output is information destined for conditional control of the output devices 2
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I/O Systems 
