Audio signal reproduction apparatus with frequency response dependent upon error rates

DETAILED DESCRIPTION FIG.
1 shows a basic circuit of an audio reproduction circuit having a linear interpolation stage 2 and an error correcting circuit 1 such as is known for example from Sony IC CXD1167Q or Philips SAA7220.
The error correcting stage 1 has two outputs, the first of which is directly connected to the interpolation stage 2 of an audio channel and the second of which is connected to an input of a sample value checking circuit (sample check) 3.
The first output of the error correcting circuit 1 is connected to an input of a first sample and hold circuit (n-1) 4a which, for its part, is connected to a further sample and hold circuit 4b via a data bus.
Moreover, the first sample and hold circuit 4a is connected to a divider which divides the value of the sampling value by 2.
One output of the sample and hold circuit 4b is coupled directly to a first input terminal of a switch 5 while another output of the sample and hold circuit 4b is connected to an input of a third sample and hold circuit 4c (n-1) whose output is connected to a second divider circuit 6b.
The outputs of the two divider circuits 6a and 6b are-connected respectively to a summing circuit 7 whose output is coupled to a second input terminal of the switch 5.
The output of the switch 5 forms the data output of the interpolation stage.
The sample value checking circuit 3 checks the sampling values for deficiencies i.
e.
including their lack of correctability by the error correcting stage 1, and generates a logical 1 for a faulty sampling value and a logical 0 for a correct sampling value.
These values are supplied to a cascade connection of register circuits 4d, 4e and 4f.
The outputs of the register circuits 4d and 4f are connected respectively to inverters 8a and 8b whose outputs are coupled to respective input terminals of an AND circuit 9.
The output of the register circuit 4e is coupled to a third input terminal of the AND circuit 9.
The output of the AND circuit is coupled to control the switching circuit 5 between positions of the outputs of the summing circuit 7 and the sample and hold circuit 4b