Bus control for small computer system interface with transfer indication preceding final word transfer and buffer empty indication preceding receipt acknowledgement

DETAILED DESCRIPTION Accordingly, it is an object of the present invention to provide a SCSI bus control which has overcome the above mentioned defect of the conventional one.
Another object of the present invention is to provide a SCSI bus control which can applied to an initiator having a FIFO and which permits a target to change its phase after the FIFO has become empty.
The above and other objects of the present invention are achieved in accordance with the present invention by a bus control system including a handshake control circuit connected to receive an information transfer request signal from a data bus and to generate an information receipt acknowledge signal, the handshake control circuit operating to control a handshake between the information transfer request signal and the information receipt acknowledge signal, a first in-first out type memory coupled to the data bus and controlled by the handshake control circuit so as to receive information from the data bus and to output information to the data bus, the memory outputting an empty signal when the memory is empty, the empty signal being supplied to the handshake control circuit, a counter configured to be preset with an information transfer number and coupled to receive the information receipt acknowledge signal generated by the handshake control circuit so as to count the number of the information transfers executed and to generate a transfer completion ready signal when the information transfers of the number less than the preset number of the information transfers by one have been executed, and an information receipt acknowledge hold control circuit coupled to receive the transfer completion ready signal, the information receipt acknowledge hold control circuit operating to control the handshake control circuit, after the transfer completion ready signal is activated, so as to cause the handshake control circuit to hold the information receipt acknowledge signal in an active condition after the information receipt acknowledge signal in correspondence to a last information transfer is activated and until the empty signal is activated to indicate the empty of the memory