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Control-store-apparatus-having-dual-mode-operation-handling-mechanism

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Control store apparatus having dual mode operation handling mechanism

Details

Inventors: Terakawa, Kiyoshi H.; Hartley, Henry F.;
Assignee: Honeywell Information Systems Inc. (Waltham, MA)
Primary Examiner: Thomas; James D.
Assistant Examiner: Eng; David Y.
Attorney, Agent or Firm: Solakian; John S., Prasinos; Nicholas

A writeable control store in a data processing system is provided with a dual mode capability. Coupled with the control store in the system is a central processing unit which may provide the next address of the control store's memory dependent upon the mode of the control store. Otherwise, also dependent upon such mode, the control store memory is addressed, dependent upon the results of tests conducted in the central processing unit, by one of at least two alternative addresses. The control words addressed in the writeable control store are used to control the operation of the central processing unit.

DETAILED DESCRIPTION A data processing system comprising a central processing unit and a storage device, which device includes a control store for storing a plurality of control words used to control the operation of the central processing unit.
Also provided is apparatus for addressing any one of the control words in the control store.
A mode switch is included in the storage device and is used to set the system in either a first mode or a second mode.
Responsive to the mode set by such mode switch are apparatus, a first of which, in response to the setting of the first mode and responsive to a control word address from the apparatus for addressing, for receiving an address for the control store's memory from the central processing unit for use by the apparatus for addresssing to address the memory.
The second such mode responsive apparatus, responsive to the setting of the second mode, directs that an alternative address, which is different from the address provided by the unit during the first mode, be utilized by the apparatus for addressing in addressing the control store's memory.
Further apparatus is provided which selects one of at least two alternative addresses dependent upon one or more tests conducted in the central processing unit.
BACKGROUND OF THE INVENTION The present invention generally relates to data processing systems and more particularly relates to a system with a central processing unit which has user-accessible control storage.
Today's continued advancement of computer technology has produced a user-accessible control store extension within a central processor unit (CPU), which extension is sometimes called a writeable control store (WCS).
This WCS feature provides a user with extremely powerful hardware instructions that extend as well as enhance the standard CPU software instruction set to achieve optimum CPU performance for software routines critical to a particular user application, and allows them to execute at speeds comparable to the native CPU instructions

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