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Details
Inventors: Leshem, Eli;
Assignee: EMC Corporation (Hopkinton, MA)
Primary Examiner: Swann; J. J.
Assistant Examiner:
Attorney, Agent or Firm: Fish & Richardson P.C.

A computer/disk storage system interface is provided having disk controller, CPU controller, and cache memory printed circuit boards interconnected through buses provided in a backplane. The backplane has columns of electrical connectors. Each electrical connector has a plurality of rows of pins. One portion of the pins in each row is electrically connected to one bus and the other portion of the pins is electrically connected to the other bus. Each printed circuit board has an electrical connector adapted to connect with the backplane electrical connectors. While the number of pins in the each row of the cache memory printed circuit board electrical connector is the same as the number of pins in each row of the backplane electrical connector, the number of pins in each row of the controller printed circuit board electrical connector is less than the number of pins in the row of pins in the backplane electrical connector.

DETAILED DESCRIPTION In accordance with one feature of the present invention, a computer/disk storage system interface is provided having disk controller, CPU controller, and cache memory printed circuit boards connected to a bank of disk drives and main frame computer system though buses provided in a backplane.
The backplane has columns of electrical connectors.
Each connector has four pins in each row of the connector.
One pair of the pins is electrically connected to one bus and the other pair of pins is connected to the other bus.
Each cache memory printed circuit board has a connector to mate with the any one of the backplane connectors.
The cache memory board connector has four pins in each row of the connector.
One pair, when connected to its mated backplane connector, becomes electrically connected to one bus and the other pair of pins becomes connected to the other bus.
Each controller printed circuit board has a connector to mate with any one of the columns of backplane connectors.
Each controller printed circuit board connector has only two pins in each row of the connector to mate with only two of the four pins in each row of the backplane connector.
Thus, each one of the controller printed circuit board electrical connectors has fewer pins in each row thereof than the number of pins in the row of backplane connector electrical connectors mating with it.
With such an arrangement, because the controller printed circuit boards do not have pins to connect with two of the four pins in each row of a backplane connector, driver circuitry used in the controllers and cache memories to couple signals onto the buses have substantially reduced loading as compared with an arrangement where the controller printed circuit board has additional pair of, albeit unused pins.
These unused, but connected pins of the controller printed circuit boards, have been found to provide capacitive and/or electromagnetic coupling to the buses and more importantly, to driver circuitry used in the controllers and cache memories to couple data onto the buses



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