Digital computer having unique instruction decoding logic

DETAILED DESCRIPTION The present invention employs a gate array, embodied in a single integrated circuit packaged in a single encapsulation, to perform decoding of each instruction in order to produce the address within a control store of a sequence of microinstructions that will control a computer in performing the operations specified by that instruction.
It is advantageous to employ the present invention: the aforementioned design tradeoff is worked to advantage by designing a machine requiring sufficient complexity in the instruction cracking logic that it becomes economically feasible to procure custom-configured gate arrays embodying all the gating necessary to translate instructions into control store addresses.
The initial costs of procuring and configuring off-the-shelf gate arrays are significantly less than the costs of custom-fabricating integrated circuits, yet the resultant gate array occupies only a single DIP (dual inline package).
Under this approach, reductions in the size and complexity of the control store actually result in reductions in the size, complexity, and cost of the cracking logic, running directly counter to the historical limitations.
Additional benefits are inherently realized in the use of the present invention: circuit delays inherent in instruction cracking are minimized; power consumption is reduced.
Therefore, it is an object of the present invention to provide an improved digital computer.
It is another object of the present invention to provide a microcode-controlled digital computer in which the instruction cracking logic and the control store occupy minimum space.
It is a further object of the present invention to provide a microcode-controlled digital computer in which the cracking logic and control store have minimum cost.
It is yet another object of the present invention to provide a digital computer in which instruction decoding is accomplished at high speed.
It is yet a further object of the present invention to provide a digital computer in which power consumption is reduced