Dual port memory device with improved serial access scheme

DETAILED DESCRIPTION OF THE DRAWINGS FIG.
1 is a schematic block diagram of a dual port memory according to a prior art; FIG.
2 is a timing diagram showing operation of the memory of FIG.
1; FIG.
3 is a schematic diagram showing a dual port memory according to one embodiment of the present invention; FIG.
4 is a schematic circuit diagram of the bus line section in the memory of FIG.
3; FIG.
5 is a schematic block diagram showing an example of the switching circuit and the shift register in FIG.
3; and FIG.
6 is a schematic block diagram showing another example of the switching circuit and the shift register: DETAILED DESCRIPTION OF THE INVENTION Referring to FIGS.
1 and 2, a dual port memory described in the above U.
S.
Patent specification is described.
As shown in FIG.
1, A RAM unit 100 is identical to the ordinary RAM.
A row address buffer 101 receives row address inputs X.
sub.
0, X.
sub.
1, .
.
.
, and X.
sub.
n, and a row decoder 102 selects a word line of a memory cell array 106 in response to the outputs of the buffer 101 under control of a control signal RAS.
A column address buffer 103 receives column address inputs Y.
sub.
0, Y.
sub.
1, .
.
.
, and Y.
sub.
n, and a column decoder 104 connects a selected bit line with a data bus line 105 in response to RE.
An output buffer 107 is controlled by a control signal DE to extract the data of the data bus line as an output OUT.
An input buffer 108 is used for writing an input data IN to the data bus line 105 when a write operation is performed.
By the actions of a row address buffer 101 and a row decoder 102, an arbitrary word line WL of a cell array 106 is selected in accordance with the levels of the row address inputs X.
sub.
0, X.
sub.
1, .
.
.
, and X.
sub.
n.
After the selection of the predetermined word line WL, there is established on digit lines DL intersecting the selected word line voltage differences which correspond tot he stored levels of cells 109 and such voltage differences are amplified to the low or high level by the conventional sensing operation